/external/llvm/test/MC/Mips/msa/ |
D | test_vec.s | 4 # CHECK: bmnz.v $w17, $w6, $w7 # encoding: [0x78,0x87,0x34,0x5e] 7 # CHECK: nor.v $w7, $w31, $w0 # encoding: [0x78,0x40,0xf9,0xde] 9 # CHECK: xor.v $w7, $w27, $w15 # encoding: [0x78,0x6f,0xd9,0xde] 12 bmnz.v $w17, $w6, $w7 15 nor.v $w7, $w31, $w0 17 xor.v $w7, $w27, $w15
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D | test_3r.s | 76 # CHECK: cle_u.h $w7, $w0, $w29 # encoding: [0x7a,0xbd,0x01,0xcf] 82 # CHECK: clt_s.d $w7, $w30, $w12 # encoding: [0x79,0x6c,0xf1,0xcf] 86 # CHECK: clt_u.d $w7, $w0, $w1 # encoding: [0x79,0xe1,0x01,0xcf] 108 # CHECK: dpsub_s.w $w4, $w7, $w6 # encoding: [0x7a,0x46,0x39,0x13] 112 # CHECK: dpsub_u.d $w7, $w10, $w26 # encoding: [0x7a,0xfa,0x51,0xd3] 122 # CHECK: hsub_u.h $w7, $w12, $w14 # encoding: [0x7b,0xae,0x61,0xd5] 142 # CHECK: maddv.h $w7, $w24, $w9 # encoding: [0x78,0xa9,0xc1,0xd2] 147 # CHECK: max_a.w $w7, $w18, $w30 # encoding: [0x7b,0x5e,0x91,0xce] 154 # CHECK: max_u.h $w5, $w6, $w7 # encoding: [0x79,0xa7,0x31,0x4e] 155 # CHECK: max_u.w $w16, $w4, $w7 # encoding: [0x79,0xc7,0x24,0x0e] [all …]
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D | test_bit.s | 22 # CHECK: bseti.d $w7, $w15, 1 # encoding: [0x7a,0x01,0x79,0xc9] 37 # CHECK: srai.w $w7, $w26, 1 # encoding: [0x78,0xc1,0xd1,0xc9] 40 # CHECK: srari.h $w7, $w6, 4 # encoding: [0x79,0x64,0x31,0xca] 71 bseti.d $w7, $w15, 1 86 srai.w $w7, $w26, 1 89 srari.h $w7, $w6, 4
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D | test_2rf.s | 11 # CHECK: ffint_u.w $w7, $w27 # encoding: [0x7b,0x3e,0xd9,0xde] 19 # CHECK: frint.w $w7, $w15 # encoding: [0x7b,0x2c,0x79,0xde] 44 ffint_u.w $w7, $w27 52 frint.w $w7, $w15
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D | test_i5.s | 16 # CHECK: clei_u.h $w29, $w7, 17 # encoding: [0x7a,0xb1,0x3f,0x47] 40 # CHECK: mini_u.h $w7, $w26, 18 # encoding: [0x7a,0xb2,0xd1,0xc6] 61 clei_u.h $w29, $w7, 17 85 mini_u.h $w7, $w26, 18
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/external/libhevc/common/arm64/ |
D | ihevc_intra_pred_chroma_planar.s | 129 ldr w7, [x6] 130 sxtw x7,w7 131 dup v0.4h,w7 //src[nt-1] 138 ldr w7, [x6] 139 sxtw x7,w7 140 dup v1.4h,w7 //src[3nt+1] 185 ldr w7, [x6], #-2 //src[2nt-1-row] (dec to take into account row) 186 sxtw x7,w7 191 dup v4.4h,w7 //src[2nt-1-row] 199 ldr w7, [x6], #-2 //src[2nt-1-row] (dec to take into account row) [all …]
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D | ihevc_intra_pred_luma_planar.s | 126 ldr w7, [x6] 127 sxtw x7,w7 128 dup v0.8b,w7 //src[nt-1] 133 ldr w7, [x6] 134 sxtw x7,w7 135 dup v1.8b,w7 //src[3nt+1] 535 ldr w7, [x6], #-1 //src[2nt-1-row] (dec to take into account row) 536 sxtw x7,w7 537 dup v4.8b,w7 //src[2nt-1-row]
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D | ihevc_sao_edge_offset_class3_chroma.s | 98 mov w7, w24 //Loads wd 334 mov w7, w24 //Loads wd 374 mov w7, w24 //Loads wd 750 LDR w7, [x5],#4 //au1_src_left_tmp[row] 752 STR w7, [x11],#4 //pu1_src_left[row] = au1_src_left_tmp[row] 760 mov w7, w24 //Loads wd 768 mov w7, w24 //Loads wd 807 mov w7, w24 //Loads wd 941 LDR w7, [x5],#4 //au1_src_left_tmp[row] 943 STR w7, [x11],#4 //pu1_src_left[row] = au1_src_left_tmp[row] [all …]
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/external/openssh/ |
D | blocks.c | 59 M(w6 ,w4 ,w15,w7 ) \ 60 M(w7 ,w5 ,w0 ,w8 ) \ 62 M(w9 ,w7 ,w2 ,w10) \ 67 M(w14,w12,w7 ,w15) \ 113 uint64 w7 = load_bigendian(in + 56); in crypto_hashblocks_sha512() local 130 F(w7 ,0xab1c5ed5da6d8118ULL) in crypto_hashblocks_sha512() 149 F(w7 ,0x76f988da831153b5ULL) in crypto_hashblocks_sha512() 168 F(w7 ,0x92722c851482353bULL) in crypto_hashblocks_sha512() 187 F(w7 ,0x682e6ff3d6b2b8a3ULL) in crypto_hashblocks_sha512() 206 F(w7 ,0x1b710b35131c471bULL) in crypto_hashblocks_sha512()
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/external/boringssl/linux-aarch64/crypto/fipsmodule/ |
D | sha1-armv8.S | 95 add w20,w20,w7 // future e+=X[i] 249 eor w5,w5,w7 275 eor w7,w7,w9 279 eor w7,w7,w15 283 eor w7,w7,w4 287 ror w7,w7,#31 300 add w24,w24,w7 // future e+=X[i] 323 eor w10,w10,w7 379 eor w15,w15,w7 447 eor w5,w5,w7 [all …]
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D | sha256-armv8.S | 118 eor w7,w23,w23,ror#14 124 eor w16,w16,w7,ror#11 // Sigma1(e) 125 ror w7,w27,#2 132 eor w17,w7,w17,ror#13 // Sigma0(a) 163 ldp w7,w8,[x1],#2*4 186 rev w7,w7 // 4 194 add w23,w23,w7 // h+=X[i] 386 str w7,[sp,#0] 389 eor w7,w20,w20,ror#14 395 eor w16,w16,w7,ror#11 // Sigma1(e) [all …]
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/external/boringssl/ios-aarch64/crypto/fipsmodule/ |
D | sha1-armv8.S | 94 add w20,w20,w7 // future e+=X[i] 248 eor w5,w5,w7 274 eor w7,w7,w9 278 eor w7,w7,w15 282 eor w7,w7,w4 286 ror w7,w7,#31 299 add w24,w24,w7 // future e+=X[i] 322 eor w10,w10,w7 378 eor w15,w15,w7 446 eor w5,w5,w7 [all …]
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D | sha256-armv8.S | 117 eor w7,w23,w23,ror#14 123 eor w16,w16,w7,ror#11 // Sigma1(e) 124 ror w7,w27,#2 131 eor w17,w7,w17,ror#13 // Sigma0(a) 162 ldp w7,w8,[x1],#2*4 185 rev w7,w7 // 4 193 add w23,w23,w7 // h+=X[i] 385 str w7,[sp,#0] 388 eor w7,w20,w20,ror#14 394 eor w16,w16,w7,ror#11 // Sigma1(e) [all …]
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/external/boringssl/ios-aarch64/crypto/chacha/ |
D | chacha-armv8.S | 67 mov w7,w23 88 add w7,w7,w11 92 eor w20,w20,w7 112 add w7,w7,w11 116 eor w20,w20,w7 136 add w7,w7,w12 140 eor w19,w19,w7 160 add w7,w7,w12 164 eor w19,w19,w7 186 add w7,w7,w23 [all …]
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/external/boringssl/linux-aarch64/crypto/chacha/ |
D | chacha-armv8.S | 68 mov w7,w23 89 add w7,w7,w11 93 eor w20,w20,w7 113 add w7,w7,w11 117 eor w20,w20,w7 137 add w7,w7,w12 141 eor w19,w19,w7 161 add w7,w7,w12 165 eor w19,w19,w7 187 add w7,w7,w23 [all …]
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/external/llvm/test/MC/Disassembler/Mips/msa/ |
D | test_3r.txt | 76 0x7a 0xbd 0x01 0xcf # CHECK: cle_u.h $w7, $w0, $w29 82 0x79 0x6c 0xf1 0xcf # CHECK: clt_s.d $w7, $w30, $w12 86 0x79 0xe1 0x01 0xcf # CHECK: clt_u.d $w7, $w0, $w1 108 0x7a 0x46 0x39 0x13 # CHECK: dpsub_s.w $w4, $w7, $w6 112 0x7a 0xfa 0x51 0xd3 # CHECK: dpsub_u.d $w7, $w10, $w26 122 0x7b 0xae 0x61 0xd5 # CHECK: hsub_u.h $w7, $w12, $w14 142 0x78 0xa9 0xc1 0xd2 # CHECK: maddv.h $w7, $w24, $w9 147 0x7b 0x5e 0x91 0xce # CHECK: max_a.w $w7, $w18, $w30 154 0x79 0xa7 0x31 0x4e # CHECK: max_u.h $w5, $w6, $w7 155 0x79 0xc7 0x24 0x0e # CHECK: max_u.w $w16, $w4, $w7 [all …]
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D | test_vec.txt | 4 0x78 0x87 0x34 0x5e # CHECK: bmnz.v $w17, $w6, $w7 7 0x78 0x40 0xf9 0xde # CHECK: nor.v $w7, $w31, $w0 9 0x78 0x6f 0xd9 0xde # CHECK: xor.v $w7, $w27, $w15
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/external/libavc/common/armv8/ |
D | ih264_weighted_pred_av8.s | 150 subs w7, w7, #4 //decrement ht by 4 201 subs w7, w7, #4 //decrement ht by 4 257 subs w7, w7, #4 //decrement ht by 4 377 subs w7, w7, #2 //decrement ht by 2 391 subs w7, w7, #2 //decrement ht by 2 458 subs w7, w7, #4 //decrement ht by 4
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/external/llvm/test/MC/AArch64/ |
D | arm64-basic-a64-instructions.s | 3 crc32b w5, w7, w20 6 crc32x w7, w9, x20
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D | cyclone-crc.s | 17 crc32ch w3, w5, w7 23 CHECK: crc32ch w3, w5, w7
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D | alias-addsubimm.s | 89 cmn w7, #5 90 cmp w7, #-5
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D | basic-a64-instructions.s | 36 add w2, w5, w7, uxtb 81 sub w2, w5, w7, uxtb 116 adds w2, w5, w7, uxtb 151 subs w2, w5, w7, uxtb 186 cmp w5, w7, uxtb 222 cmn w5, w7, uxtb 361 add w3, w5, w7 389 add w5, w6, w7, asr #21 433 adds w3, w5, w7 457 adds w5, w6, w7, asr #21 [all …]
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/external/llvm/test/MC/Disassembler/AArch64/ |
D | arm64-crc32.txt | 3 # CHECK: crc32b w5, w7, w20 6 # CHECK: crc32x w7, w9, x20
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/external/libmpeg2/common/armv8/ |
D | impeg2_format_conv.s | 183 ldr w7, [sp, #88] //// Load u2_strideu from stack 184 sxtw x7, w7 356 ldr w7, [sp, #80] //// Load u2_strideu from stack 357 sxtw x7, w7
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/external/llvm/test/MC/Mips/mips32r2/ |
D | invalid-msa.s | 11 …bsel.v $w28,$w7,$w0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f… 44 …ftrunc_s.w $w24,$w7 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f… 46 …ftrunc_u.w $w7,$w26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f… 49 …nloc.d $w16,$w7 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f… 52 …nlzc.b $w12,$w7 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f…
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