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Searched refs:workaround_bo (Results 1 – 9 of 9) sorted by relevance

/external/mesa3d/src/mesa/drivers/dri/i965/
Dbrw_pipe_control.c267 brw->workaround_bo, 0, in gen7_emit_vs_workaround_flush()
281 brw->workaround_bo, 0, in gen7_emit_cs_stall_flush()
331 brw->workaround_bo, 0, 0, 0); in brw_emit_post_sync_nonzero_flush()
375 brw->workaround_bo = drm_intel_bo_alloc(brw->bufmgr, in brw_init_pipe_control()
378 if (brw->workaround_bo == NULL) in brw_init_pipe_control()
389 drm_intel_bo_unreference(brw->workaround_bo); in brw_fini_pipe_control()
Dgen8_depth_state.c515 brw->workaround_bo, 0, 0, 0); in gen8_hiz_exec()
Dbrw_context.h698 drm_intel_bo *workaround_bo; member
/external/mesa3d/src/gallium/drivers/ilo/
Dilo_render.c50 render->workaround_bo = intel_winsys_alloc_bo(builder->winsys, in ilo_render_create()
52 if (!render->workaround_bo) { in ilo_render_create()
74 intel_bo_unref(render->workaround_bo); in ilo_render_destroy()
Dilo_render_gen.h52 struct intel_bo *workaround_bo; member
368 struct intel_bo *bo = (write_mask) ? r->workaround_bo : NULL; in ilo_render_pipe_control()
/external/mesa3d/src/intel/vulkan/
Danv_device.c963 anv_bo_init_new(&device->workaround_bo, device, 1024); in anv_CreateDevice()
1028 anv_gem_munmap(device->workaround_bo.map, device->workaround_bo.size); in anv_DestroyDevice()
1029 anv_gem_close(device, device->workaround_bo.gem_handle); in anv_DestroyDevice()
Danv_private.h598 struct anv_bo workaround_bo; member
DgenX_pipeline.c254 pc.Address = (struct anv_address) { &device->workaround_bo, 0 }; in genX()
DgenX_cmd_buffer.c1541 (struct anv_address) { &cmd_buffer->device->workaround_bo, 0 }; in genX()