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/external/vixl/test/test-trace-reference/
Dlog-regs2 # x1: 0x~~~~~~~~~~~~~~~~
131 # x1: 0x~~~~~~~~~~~~~~~~
132 # x1: 0x~~~~~~~~~~~~~~~~
139 # x1: 0x~~~~~~~~~~~~~~~~
140 # x1: 0x~~~~~~~~~~~~~~~~
147 # x1: 0x~~~~~~~~~~~~~~~~
148 # x1: 0x~~~~~~~~~~~~~~~~
153 # x1: 0x~~~~~~~~~~~~~~~~
154 # x1: 0x~~~~~~~~~~~~~~~~
158 # x1: 0x~~~~~~~~~~~~~~~~
[all …]
Dlog-state2 # x1: 0x~~~~~~~~~~~~~~~~
187 # x1: 0x~~~~~~~~~~~~~~~~
188 # x1: 0x~~~~~~~~~~~~~~~~
195 # x1: 0x~~~~~~~~~~~~~~~~
196 # x1: 0x~~~~~~~~~~~~~~~~
203 # x1: 0x~~~~~~~~~~~~~~~~
204 # x1: 0x~~~~~~~~~~~~~~~~
209 # x1: 0x~~~~~~~~~~~~~~~~
210 # x1: 0x~~~~~~~~~~~~~~~~
214 # x1: 0x~~~~~~~~~~~~~~~~
[all …]
/external/llvm/test/Bitcode/
DbitwiseInstructions.3.2.ll8 define void @shl(i8 %x1){
10 ; CHECK: %res1 = shl i8 %x1, %x1
11 %res1 = shl i8 %x1, %x1
13 ; CHECK: %res2 = shl nuw i8 %x1, %x1
14 %res2 = shl nuw i8 %x1, %x1
16 ; CHECK: %res3 = shl nsw i8 %x1, %x1
17 %res3 = shl nsw i8 %x1, %x1
19 ; CHECK: %res4 = shl nuw nsw i8 %x1, %x1
20 %res4 = shl nuw nsw i8 %x1, %x1
25 define void @lshr(i8 %x1){
[all …]
DbinaryIntInstructions.3.2.ll8 define void @add(i1 %x1, i8 %x2 ,i16 %x3, i32 %x4, i64 %x5){
10 ; CHECK: %res1 = add i1 %x1, %x1
11 %res1 = add i1 %x1, %x1
25 ; CHECK: %res6 = add nuw i1 %x1, %x1
26 %res6 = add nuw i1 %x1, %x1
28 ; CHECK: %res7 = add nsw i1 %x1, %x1
29 %res7 = add nsw i1 %x1, %x1
31 ; CHECK: %res8 = add nuw nsw i1 %x1, %x1
32 %res8 = add nuw nsw i1 %x1, %x1
37 define void @addvec8NuwNsw(<2 x i8> %x1, <3 x i8> %x2 ,<4 x i8> %x3, <8 x i8> %x4, <16 x i8> %x5){
[all …]
DmiscInstructions.3.2.ll18 define void @landingpadInstr1(i1 %cond1, <2 x i1> %cond2, <2 x i8> %x1, <2 x i8> %x2){
29 define void @landingpadInstr2(i1 %cond1, <2 x i1> %cond2, <2 x i8> %x1, <2 x i8> %x2){
40 define void @landingpadInstr3(i1 %cond1, <2 x i1> %cond2, <2 x i8> %x1, <2 x i8> %x2){
63 define void @selectInstr(i1 %cond1, <2 x i1> %cond2, <2 x i8> %x1, <2 x i8> %x2){
67 ; CHECK-NEXT: %res2 = select <2 x i1> %cond2, <2 x i8> %x1, <2 x i8> %x2
68 %res2 = select <2 x i1> %cond2, <2 x i8> %x1, <2 x i8> %x2
73 define void @icmp(i32 %x1, i32 %x2, i32* %ptr1, i32* %ptr2, <2 x i32> %vec1, <2 x i32> %vec2){
75 ; CHECK: %res1 = icmp eq i32 %x1, %x2
76 %res1 = icmp eq i32 %x1, %x2
78 ; CHECK-NEXT: %res2 = icmp ne i32 %x1, %x2
[all …]
DbinaryFloatInstructions.3.2.ll8 define void @fadd(float %x1, double %x2 ,half %x3, fp128 %x4, x86_fp80 %x5, ppc_fp128 %x6){
10 ; CHECK: %res1 = fadd float %x1, %x1
11 %res1 = fadd float %x1, %x1
31 define void @faddFloatVec(<2 x float> %x1, <3 x float> %x2 ,<4 x float> %x3, <8 x float> %x4, <16 x…
33 ; CHECK: %res1 = fadd <2 x float> %x1, %x1
34 %res1 = fadd <2 x float> %x1, %x1
51 define void @faddDoubleVec(<2 x double> %x1, <3 x double> %x2 ,<4 x double> %x3, <8 x double> %x4, …
53 ; CHECK: %res1 = fadd <2 x double> %x1, %x1
54 %res1 = fadd <2 x double> %x1, %x1
71 define void @faddHalfVec(<2 x half> %x1, <3 x half> %x2 ,<4 x half> %x3, <8 x half> %x4, <16 x half…
[all …]
/external/clang/test/SemaCXX/
Dwarn-bad-memaccess.cpp24 struct X1 { virtual void f(); } x1, x1arr[2]; variable
33 memset(&x1, 0, sizeof x1); // \ in test_warn()
44 memmove(&x1, 0, sizeof x1); // \ in test_warn()
47 memmove(0, &x1, sizeof x1); // \ in test_warn()
50 memcpy(&x1, 0, sizeof x1); // \ in test_warn()
53 memcpy(0, &x1, sizeof x1); // \ in test_warn()
56 memcmp(&x1, 0, sizeof x1); // \ in test_warn()
59 memcmp(0, &x1, sizeof x1); // \ in test_warn()
63 __builtin_memset(&x1, 0, sizeof x1); // \ in test_warn()
70 __builtin_memmove(&x1, 0, sizeof x1); // \ in test_warn()
[all …]
/external/llvm/test/MC/AArch64/
Darm64-simd-ldst.s4 ld1.8b {v0}, [x1]
5 ld1.8b {v0, v1}, [x1]
6 ld1.8b {v0, v1, v2}, [x1]
7 ld1.8b {v0, v1, v2, v3}, [x1]
9 ld1.8b {v3}, [x1]
14 ld1.16b {v0}, [x1]
15 ld1.16b {v0, v1}, [x1]
16 ld1.16b {v0, v1, v2}, [x1]
17 ld1.16b {v0, v1, v2, v3}, [x1]
19 ld1.4h {v0}, [x1]
[all …]
Darm64-logical-encoding.s11 and x1, x2, #15
16 ands x1, x2, #15
21 ; CHECK: and x1, x2, #0xf ; encoding: [0x41,0x0c,0x40,0x92]
26 ; CHECK: ands x1, x2, #0xf ; encoding: [0x41,0x0c,0x40,0xf2]
29 eor x1, x2, #0x8000
32 ; CHECK: eor x1, x2, #0x8000 ; encoding: [0x41,0x00,0x71,0xd2]
35 orr x1, x2, #0x8000
38 ; CHECK: orr x1, x2, #0x8000 ; encoding: [0x41,0x00,0x71,0xb2]
51 and x1, x2, x3
53 and x1, x2, x3, lsl #2
[all …]
Dalias-addsubimm.s9 sub x1, x3, #2, lsl 12
10 add x1, x3, #-2, lsl 12
13 sub x1, x3, #4
14 add x1, x3, #-4
17 sub x1, x3, #4095, lsl 0
18 add x1, x3, #-4095, lsl 0
28 add x1, x3, #2, lsl 12
29 sub x1, x3, #-2, lsl 12
32 add x1, x3, #4
33 sub x1, x3, #-4
[all …]
Darmv8.1a-atomic.s17 casalb x0, x1, [x2]
48 casl w0, x1, [x2]
58 cas x0, x1, [x2]
59 casa x0, x1, [x2]
60 casl x0, x1, [x2]
61 casal x0, x1, [x2]
68 casa x0, x1, [w2]
79 ldadda x0, x1, [x2]
80 ldclrl x0, x1, [x2]
81 ldeoral x0, x1, [x2]
[all …]
Darm64-arithmetic-encoding.s9 adc x1, x2, x3
14 ; CHECK: adc x1, x2, x3 ; encoding: [0x41,0x00,0x03,0x9a]
19 sbc x1, x2, x3
21 sbcs x1, x2, x3
24 ; CHECK: sbc x1, x2, x3 ; encoding: [0x41,0x00,0x03,0xda]
26 ; CHECK: sbcs x1, x2, x3 ; encoding: [0x41,0x00,0x03,0xfa]
188 add x1, x2, w3, uxtb
189 add x1, x2, w3, uxth
190 add x1, x2, w3, uxtw
191 add x1, x2, w3, sxtb
[all …]
/external/libavc/common/armv8/
Dih264_intra_pred_luma_8x8_av8.s122 st1 {v0.8b}, [x1], x3
123 st1 {v0.8b}, [x1], x3
124 st1 {v0.8b}, [x1], x3
125 st1 {v0.8b}, [x1], x3
126 st1 {v0.8b}, [x1], x3
127 st1 {v0.8b}, [x1], x3
128 st1 {v0.8b}, [x1], x3
129 st1 {v0.8b}, [x1], x3
204 st1 {v0.8b}, [x1], x3
207 st1 {v1.8b}, [x1], x3
[all …]
Dih264_padding_neon_av8.s89 sxtw x1, w1
92 sub x5, x0, x1
93 neg x6, x1
175 sxtw x1, w1
181 sub x6, x1, #16
186 add x0, x0, x1
188 add x0, x0, x1
191 add x0, x0, x1
192 st1 {v0.16b}, [x4], x1 // 16 bytes store
194 st1 {v2.16b}, [x4], x1 // 16 bytes store
[all …]
Dih264_intra_pred_luma_4x4_av8.s119 st1 {v0.s}[0], [x1], x3
120 st1 {v0.s}[0], [x1], x3
121 st1 {v0.s}[0], [x1], x3
122 st1 {v0.s}[0], [x1], x3
191 st1 {v0.s}[0], [x1], x3
193 st1 {v2.s}[0], [x1], x3
195 st1 {v3.s}[0], [x1], x3
196 st1 {v4.s}[0], [x1], x3
295 st1 {v0.s}[0], [x1], x3
296 st1 {v0.s}[0], [x1], x3
[all …]
/external/libvncserver/libvncserver/
Ddraw.c3 void rfbFillRect(rfbScreenInfoPtr s,int x1,int y1,int x2,int y2,rfbPixel col) in rfbFillRect() argument
12 for(i=x1;i<x2;i++) in rfbFillRect()
14 rfbMarkRectAsModified(s,x1,y1,x2,y2); in rfbFillRect()
31 void rfbDrawLine(rfbScreenInfoPtr s,int x1,int y1,int x2,int y2,rfbPixel col) in rfbDrawLine() argument
40 #define SWAPPOINTS { i=x1; x1=x2; x2=i; i=y1; y1=y2; y2=i; } in rfbDrawLine()
41 if(abs(x1-x2)<abs(y1-y2)) { in rfbDrawLine()
45 SETPIXEL(x1+(i-y1)*(x2-x1)/(y2-y1),i); in rfbDrawLine()
47 if(x2<x1) { i=x1; x1=x2; x2=i; } in rfbDrawLine()
48 rfbMarkRectAsModified(s,x1,y1,x2+1,y2+1); in rfbDrawLine()
50 if(x1>x2) in rfbDrawLine()
[all …]
/external/valgrind/coregrind/m_dispatch/
Ddispatch-arm64-linux.S83 mov x21, x1
129 str x1, [x0, #0]
144 mov x1, #VG_TRC_CHAIN_ME_TO_SLOW_EP
162 mov x1, #VG_TRC_CHAIN_ME_TO_FAST_EP
180 adrp x1, VG_(stats__n_xindirs_32)
181 add x1, x1, :lo12:VG_(stats__n_xindirs_32)
182 ldr w2, [x1, #0]
184 str w2, [x1, #0]
188 mov x1, #VG_TT_FAST_MASK // x1 = VG_TT_FAST_MASK
189 and x2, x1, x0, LSR #2 // x2 = entry # = (x1 & (x0 >> 2))
[all …]
/external/deqp/data/gles3/shaders/
Dqualification_order.test19 flat out mediump float x1;
26 x1 = 2.0;
38 flat in mediump float x1;
44 float result = (x0 + x1 + x2) / 3.0;
60 flat out mediump float x1;
67 x1 = 2.0;
79 flat in mediump float x1;
85 float result = (x0 + x1 + x2) / 3.0;
101 flat out float x1;
108 x1 = 2.0;
[all …]
/external/libvpx/libvpx/vp8/encoder/x86/
Dvp8_quantize_sse2.c40 __m128i sz0, x0, sz1, x1, y0, y1, x_minus_zbin0, x_minus_zbin1; in vp8_regular_quantize_b_sse2() local
67 x1 = _mm_xor_si128(z1, sz1); in vp8_regular_quantize_b_sse2()
69 x1 = _mm_sub_epi16(x1, sz1); in vp8_regular_quantize_b_sse2()
79 x_minus_zbin1 = _mm_sub_epi16(x1, zbin1); in vp8_regular_quantize_b_sse2()
87 x1 = _mm_add_epi16(x1, round1); in vp8_regular_quantize_b_sse2()
90 y1 = _mm_mulhi_epi16(x1, quant1); in vp8_regular_quantize_b_sse2()
93 y1 = _mm_add_epi16(y1, x1); in vp8_regular_quantize_b_sse2()
156 __m128i sz0, sz1, x0, x1, y0, y1, xdq0, xdq1, zeros, ones; in vp8_fast_quantize_b_sse2() local
164 x1 = _mm_xor_si128(z1, sz1); in vp8_fast_quantize_b_sse2()
166 x1 = _mm_sub_epi16(x1, sz1); in vp8_fast_quantize_b_sse2()
[all …]
/external/eigen/test/
Dcuda_basic.cu54 T x1(in+i); in operator ()() local
59 res.array() += (in[0] * x1 + x2).array() * x3.array(); in operator ()()
69 T x1(in+i); in operator ()() local
70 int step = x1.size() * 4; in operator ()()
74 MapType(out+i*stride+0*step, x1.rows()*2, x1.cols()*2) = x1.replicate(2,2); in operator ()()
75 MapType(out+i*stride+1*step, x1.rows()*3, x1.cols()) = in[i] * x1.colwise().replicate(3); in operator ()()
76 MapType(out+i*stride+2*step, x1.rows(), x1.cols()*3) = in[i] * x1.rowwise().replicate(3); in operator ()()
87 T x1(in+i); in operator ()() local
88 out[i*N+0] = x1.minCoeff(); in operator ()()
89 out[i*N+1] = x1.maxCoeff(); in operator ()()
[all …]
/external/libhevc/common/arm64/
Dihevc_deblk_chroma_horz.s73 sub x12,x0,x1
75 sub x5,x12,x1
76 add x6,x0,x1
77 add x1,x2,x3
80 add x2,x1,#1
83 adds x1,x10,x2,asr #1
88 cmp x1,#0x39
90 ldr w1, [x3,x1,lsl #2]
92 sub x20,x1,#6
93 csel x1, x20, x1,gt
[all …]
/external/llvm/test/MC/Disassembler/AArch64/
Darm64-logical.txt18 # CHECK: and w0, w0, #0x1
19 # CHECK: and x0, x0, #0x1
21 # CHECK: and x1, x2, #0xf
23 # CHECK: ands w0, w0, #0x1
24 # CHECK: ands x0, x0, #0x1
26 # CHECK: ands x1, x2, #0xf
34 # CHECK: eor x1, x2, #0x8000
42 # CHECK: orr x1, x2, #0x8000
61 # CHECK: and x1, x2, x3
63 # CHECK: and x1, x2, x3, lsl #2
[all …]
/external/v8/src/arm64/
Dinterface-descriptors-arm64.cc18 const Register default_stub_registers[] = {x0, x1, x2, x3, x4}; in DefaultInitializePlatformSpecific()
26 return x1; in FunctionRegister()
30 const Register LoadDescriptor::ReceiverRegister() { return x1; } in ReceiverRegister()
38 const Register StoreDescriptor::ReceiverRegister() { return x1; } in ReceiverRegister()
49 const Register StringCompareDescriptor::LeftRegister() { return x1; } in LeftRegister()
70 Register registers[] = {x1, x2, x3}; in InitializePlatformSpecific()
90 Register registers[] = {x3, x2, x1, x0}; in InitializePlatformSpecific()
100 Register registers[] = {x3, x2, x1}; in InitializePlatformSpecific()
111 Register registers[] = {x3, x2, x1, x0}; in InitializePlatformSpecific()
130 Register registers[] = {x2, x3, x1}; in InitializePlatformSpecific()
[all …]
/external/apache-commons-math/src/main/java/org/apache/commons/math/analysis/solvers/
DMullerSolver.java209 double x1 = 0.5 * (x0 + x2); in solve() local
210 double y1 = f.value(x1); in solve()
227 final double d01 = (y1 - y0) / (x1 - x0); in solve()
228 final double d12 = (y2 - y1) / (x2 - x1); in solve()
230 final double c1 = d01 + (x1 - x0) * d012; in solve()
232 final double xplus = x1 + (-2.0 * y1) / (c1 + FastMath.sqrt(delta)); in solve()
233 final double xminus = x1 + (-2.0 * y1) / (c1 - FastMath.sqrt(delta)); in solve()
254 boolean bisect = (x < x1 && (x1 - x0) > 0.95 * (x2 - x0)) || in solve()
255 (x > x1 && (x2 - x1) > 0.95 * (x2 - x0)) || in solve()
256 (x == x1); in solve()
[all …]
/external/mesa3d/src/gallium/auxiliary/util/
Du_rect.h40 int x0, x1; member
51 return (!(a->x1 < b->x0 || in u_rect_test_intersection()
52 b->x1 < a->x0 || in u_rect_test_intersection()
55 a->x1 < a->x0 || in u_rect_test_intersection()
57 b->x1 < b->x0 || in u_rect_test_intersection()
70 if (b->x1 > a->x1) b->x1 = a->x1; in u_rect_find_intersection()
79 return (r->x1 - r->x0) * (r->y1 - r->y0); in u_rect_area()
95 b->x1 = b->y1 = -1; in u_rect_possible_intersection()
106 d->x1 = MAX2(a->x1, b->x1); in u_rect_union()

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