| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | gicv3-regs.txt | 140 0xa5 0xc9 0x1c 0xd5
168 0x2 0xc8 0x1c 0xd5
170 0x3b 0xc8 0x1c 0xd5
172 0x47 0xc8 0x1c 0xd5
174 0x61 0xc8 0x1c 0xd5
176 0x7 0xc9 0x1c 0xd5
178 0x2c 0xc9 0x1c 0xd5
180 0x4e 0xc9 0x1c 0xd5
182 0x6d 0xc9 0x1c 0xd5
184 0x1 0xcb 0x1c 0xd5
[all …]
|
| D | armv8.1a-vhe.txt | 3 0x20,0x20,0x1c,0xd5
4 0x20,0xd0,0x1c,0xd5
5 0x00,0xe3,0x1c,0xd5
6 0x40,0xe3,0x1c,0xd5
7 0x20,0xe3,0x1c,0xd5
|
| D | arm64-logical.txt | 205 0x41 0x1c 0x23 0x2a
206 0x41 0x1c 0x23 0xaa
207 0x41 0x1c 0x63 0x2a
208 0x41 0x1c 0x63 0xaa
209 0x41 0x1c 0xa3 0x2a
210 0x41 0x1c 0xa3 0xaa
211 0x41 0x1c 0xe3 0x2a
212 0x41 0x1c 0xe3 0xaa
|
| D | ras-extension.txt | 22 [0x20,0xc1,0x1c,0xd5]
23 [0x60,0x52,0x1c,0xd5]
|
| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/MBlaze/ |
| D | mblaze_memory.txt | 14 0xe0 0x22 0x00 0x1c
23 0xe4 0x22 0x00 0x1c
32 0xe8 0x22 0x00 0x1c
35 0xc8 0x22 0x1c 0x00
44 0xf0 0x22 0x00 0x1c
53 0xf4 0x22 0x00 0x1c
62 0xf8 0x22 0x00 0x1c
65 0xd8 0x22 0x1c 0x00
|
| /external/llvm/test/MC/Disassembler/Mips/msa/ |
| D | test_3rf.txt | 3 0x78 0x1c 0x9f 0x1b # CHECK: fadd.w $w28, $w19, $w28
26 0x78 0xb5 0xd4 0x1c # CHECK: fcune.d $w16, $w26, $w21
58 0x7a 0x6b 0xc3 0x1c # CHECK: fsor.d $w12, $w24, $w11
69 0x7a 0x82 0xfc 0x1c # CHECK: fsune.w $w16, $w31, $w2
73 0x79 0x4a 0xa4 0x1c # CHECK: madd_q.h $w16, $w20, $w10
74 0x79 0x69 0x17 0x1c # CHECK: madd_q.w $w28, $w2, $w9
75 0x7b 0x49 0x92 0x1c # CHECK: maddr_q.h $w8, $w18, $w9
77 0x79 0x8a 0xd6 0x1c # CHECK: msub_q.h $w24, $w26, $w10
79 0x7b 0x8b 0xab 0x1c # CHECK: msubr_q.h $w12, $w21, $w11
82 0x79 0x24 0x0c 0x1c # CHECK: mul_q.w $w16, $w1, $w4
|
| /external/pcre/dist2/src/ |
| D | pcre2_chartables.c.dist | 171 0x1c,0x1c,0x1c,0x1c,0x1c,0x1c,0x1c,0x1c, /* 0 - 7 */
172 0x1c,0x1c,0x00,0x00,0x00,0x00,0x00,0x80, /* 8 - ? */
|
| /external/llvm/test/MC/Disassembler/AMDGPU/ |
| D | vop2_vi.txt | 51 # VI: v_min_u32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x1c]
52 0x02 0x07 0x02 0x1c
144 # VI: v_addc_u32_e64 v1, s[0:1], v2, v3, vcc ; encoding: [0x01,0x00,0x1c,0xd1,0x02,0x07,0xaa,0x01]
145 0x01 0x00 0x1c 0xd1 0x02 0x07 0xaa 0x01
147 # VI: v_addc_u32_e64 v1, s[0:1], v2, v3, s[2:3] ; encoding: [0x01,0x00,0x1c,0xd1,0x02,0x07,0x0a,0x0…
148 0x01 0x00 0x1c 0xd1 0x02 0x07 0x0a 0x00
150 # VI: v_addc_u32_e64 v1, s[0:1], v2, v3, s[2:3] ; encoding: [0x01,0x00,0x1c,0xd1,0x02,0x07,0x0a,0x0…
151 0x01 0x00 0x1c 0xd1 0x02 0x07 0x0a 0x00
153 # FIXME: v_addc_u32_e64 v1, s[0:1], v2, v3, -1 ; encoding: [0x01,0x00,0x1c,0xd1,0x02,0x07,0x06,0x03]
154 #0x01 0x00 0x1c 0xd1 0x02 0x07 0x06 0x03
[all …]
|
| /external/sonivox/jet_tools/JetCreator/ |
| D | img_Save.py | 44 \xe0\x95?\x1e\xc7-\x06t\xb4\xd6\x10x\x05\x0e\x1d9\xc9O\xbf\xb9\x1c\xad\x02\
45 \x1c\xc7a\xd5\xaaU\x1c>|\xf8k\xc0\x14\x80)\t\xb6a\xc3\x869555\xcb\xeb\xea\
46 \xeap\x1c\x07\xdb\xb6\xb1m\x9b\xcd\xf7.`Qk5\xef}x\x94\x99Ue(c\xc8\xe6\x8b\
62 \x86\x86\x06\x1c\xc7A)E>\x9f\x07\xa0\xac\xac,,FJ)\x94RT\x96I\xb6mZ\xc8\x81\
64 \x1c!\x04\xb9\\\x0e\xad5\x85B\x81\x96\x96\x16*++{z{{\xebB\x00\xdb\xb6\x1fY\
67 $\x93I<\xcf\xc3q\x1c\xa4\x94H)\x89D"(\xa5X\xb2d\x89\xad\x94z\x14.\xd6\x01!\
71 \x02\xbe_*D7%\x93I\xc6\xc6\xc6\x18\x1c\x1cDk\x8d\x94\x13\xe9aYVhPk\x1d\xe6Ci\
72 \x1c\xb3\xc1\xf7\xfd)\x9e\x8b\xc5b\x08\xf1\x9fs\xce\x18C>\x9f\xc7q\x1c\xb4\
76 \xaf\xaf\x8f\xfe\xfe~\x06\x06\x06\xc8d2d\xb3Y\x1c\xc7\xa1X,\x86E\xa6T\xe5\
|
| D | img_Find.py | 24 \x00\x85\xc1\x85\x10tvv\x96T\xa2\x1c@\xb1\xe5\xd4]\x17\xa0\xd42\x08!\x88D"\
31 \xee\xdc|\x1bV\xa0\xd8n\x8d\xdcbt\xf43\x0e\x1d~\x95\xb6\xd6v\x06?\x1c\xe3\
34 \xef+x}\xf5\x1c\xe9\xfb\x13\xff\xba\xa7\xf3\x8d\xd7\xbb\xf8\xe5w{\xf9\xf6\
45 \x98B\xc1_]M\xc7S\xcd\xb4lj$k\x80m\xe9,%\x128\x1c\x8e\x87\x02\x97U\xc00\x8c\
56 a\xe0\xf1x0M\x93\xb1\xb11VV2L\xfc;BMM\r={{\x08\xd47\xa0:\x1c\x98\x86I,~\x9fO\
63 \xf5;\x06~w\xe5\xe7\xc0\x91\xe2\x1c\xf0\n!\x96l\xdb\xc6\xeb\xf5\xe2\xf5z\xf1\
72 \x00\x00IEND\xaeB`\x82\x8e\xd9\x1c{' )
|
| D | img_Copy.py | 16 \xcf3\x9b\r\xf0\x8f\x83\x00`{\xbbvn0\x1c-\xa6\xb9\xb0a\x18\xdf+\x17\xaa\xb7\
30 \xf7\x1f\xdc\x83i\x9a\x00\x00\xd301\x1c\r\x91\xcdd\xa7\x8b:\x00\x95\xd5\xea]\
36 \x8e\x1c>[^.\xbbo\xb7\x14,\'\xc7\xf5\x1b[\xef\xc6\x93\xf1\xb1\xb8\xb0N\x88\
|
| D | img_splash.py | 35 ,\xff\x8bF!!\xa3\xeex\x1c\x1e\x13\xca\xbd\x07"D\x94|\x02\x1bYN\xe6\x99G\xc8L\
38 \x9ax\x83\xb5\xa5\x1c\xdcT\x80\xd3\xe7\r\x9e\xe3\x97G\x96"`\xcc,\xeb\x9b\x08\
54 5\xd6A\x85V\x17\x91Q\xd3\x93S\xa4-\xb1\xf2W\x93\x95\xbe\x93R\x93u\x1c-H\x9d\
63 \xb1\x9e\x91Z\xd5\x1f\x15C\xc4\xc0\x1c\xfb\r\x9fv\xe6\xdc\x9b8\x7f\x7f\x15\
74 \xac\x04\xe5\xfc!\xd5\xb7\xd1\x0c\xbe\xfe\x97F)\xa6\x1c~\xfdP4\x81o\xfe\xa2m\
84 \xee.\x99\x958\x92\xaf&\xde\x07Igl7\x1c\xe9C,_\x99\xf8\xea4\xd4\xd5\xba\xb6\
86 \x02\xff+\xe2\xa9\xb3\xa5ki\x90\x97h \x1c\x9e\x00Z\xbc\xd5\xef\xf5~\xdcM\xa0\
88 \xa8\xbbg\xe5w\x15xJ*\xd5\xff\x1c\x9dgyz\x04\x97S\'\xcf*.\xf20\xf3~\xcdy\x14\
101 \xd4\xc0\x0ej\xa5\xd9\xbe\x1c\x1fB\t_\x17\x18\xab\xd1\xa1\xf0L\xf8\xdaK\\d\
134 \x82a`\x81`\x1c\x81\xce\x80m\x141\xb1\x8c \xa3\xdbp\x9ep>6%\xfc\x1b8C9\r\xd3\
[all …]
|
| /external/python/cpython2/Demo/tix/bitmaps/ |
| D | underline.xbm | 4 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0x1c, 0x38, 0x1c,
|
| D | bold.xbm | 4 0x00, 0x00, 0x00, 0x00, 0xfc, 0x07, 0xfc, 0x0f, 0x18, 0x1c, 0x18, 0x18,
5 0x18, 0x18, 0x18, 0x1c, 0xf8, 0x0f, 0xf8, 0x0f, 0x18, 0x18, 0x18, 0x30,
|
| /external/llvm/test/MC/Disassembler/Mips/mips32r6/ |
| D | valid-mips32r6-el.txt | 37 0x4d 0x01 0x02 0x1c # CHECK: bgtzalc $2, 1336
38 0xfa 0xff 0x02 0x1c # CHECK: bgtzalc $2, -20
41 0x4d 0x01 0x42 0x1c # CHECK: bltzalc $2, 1336
42 0xfa 0xff 0x42 0x1c # CHECK: bltzalc $2, -20
50 0x40 0x00 0xa6 0x1c # CHECK: bltuc $5, $6, 260
51 0xfa 0xff 0xa6 0x1c # CHECK: bltuc $5, $6, -20
117 0x1c 0x10 0x04 0x46 # CHECK: min.s $f0, $f2, $f4
118 0x1c 0x10 0x24 0x46 # CHECK: min.d $f0, $f2, $f4
|
| D | valid-mips32r6.txt | 47 0x1c 0x02 0x01 0x4d # CHECK: bgtzalc $2, 1336
48 0x1c 0x02 0xff 0xfa # CHECK: bgtzalc $2, -20
50 0x1c 0x42 0x01 0x4d # CHECK: bltzalc $2, 1336
51 0x1c 0x42 0xff 0xfa # CHECK: bltzalc $2, -20
52 0x1c 0xa6 0x00 0x40 # CHECK: bltuc $5, $6, 260
53 0x1c 0xa6 0xff 0xfa # CHECK: bltuc $5, $6, -20
88 0x46 0x04 0x10 0x1c # CHECK: min.s $f0, $f2, $f4
99 0x46 0x24 0x10 0x1c # CHECK: min.d $f0, $f2, $f4
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r6/ |
| D | valid-mips64r6-el.txt | 32 0x4d 0x01 0x02 0x1c # CHECK: bgtzalc $2, 1336
33 0xfa 0xff 0x02 0x1c # CHECK: bgtzalc $2, -20
43 0x40 0x00 0xa6 0x1c # CHECK: bltuc $5, $6, 260
44 0xfa 0xff 0xa6 0x1c # CHECK: bltuc $5, $6, -20
45 0x4d 0x01 0x42 0x1c # CHECK: bltzalc $2, 1336
46 0xfa 0xff 0x42 0x1c # CHECK: bltzalc $2, -20
142 0x1c 0x10 0x24 0x46 # CHECK: min.d $f0, $f2, $f4
143 0x1c 0x10 0x04 0x46 # CHECK: min.s $f0, $f2, $f4
|
| D | valid-mips64r6.txt | 64 0x1c 0x02 0x01 0x4d # CHECK: bgtzalc $2, 1336
65 0x1c 0x02 0xff 0xfa # CHECK: bgtzalc $2, -20
67 0x1c 0x42 0x01 0x4d # CHECK: bltzalc $2, 1336
68 0x1c 0x42 0xff 0xfa # CHECK: bltzalc $2, -20
69 0x1c 0xa6 0x00 0x40 # CHECK: bltuc $5, $6, 260
70 0x1c 0xa6 0xff 0xfa # CHECK: bltuc $5, $6, -20
107 0x46 0x04 0x10 0x1c # CHECK: min.s $f0, $f2, $f4
118 0x46 0x24 0x10 0x1c # CHECK: min.d $f0, $f2, $f4
|
| /external/swiftshader/third_party/subzero/tests_lit/llvm2ice_tests/ |
| D | align-spill-locations.ll | 24 ; CHECK-NEXT: add esp,0x1c
37 ; CHECK-NEXT: add esp,0x1c
86 ; CHECK-NEXT: movss DWORD PTR [esp+{{0x1c|0x2c}}],xmm0
|
| D | commutativity.ll | 86 ; CHECK-NEXT: sub esp,0x1c
103 ; CHECK-NEXT: sub esp,0x1c
120 ; CHECK-NEXT: sub esp,0x1c
137 ; CHECK-NEXT: sub esp,0x1c
|
| /external/llvm/test/CodeGen/AMDGPU/ |
| D | llvm.r600.read.local.size.ll | 29 ; VI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x1c
58 ; VI-NOHSA-DAG: s_load_dword [[Y:s[0-9]+]], s[0:1], 0x1c
96 ; VI-NOHSA-DAG: s_load_dword [[Y:s[0-9]+]], s[0:1], 0x1c
118 ; VI-NOHSA-DAG: s_load_dword [[Y:s[0-9]+]], s[0:1], 0x1c
152 ; VI: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x1c
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | thumb1.txt | 18 0xd1 0x1c
19 0xd2 0x1c
193 0x1c 0x78
432 0x1c 0x70
|
| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| D | thumb1.txt | 18 0xd1 0x1c
19 0xd2 0x1c
178 0x1c 0x78
423 0x1c 0x70
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r2/ |
| D | valid-mips64r2-el.txt | 18 0x4c 0x01 0x1c 0x45 # CHECK: bc1f $fcc7, 1332
24 0x4c 0x01 0xc0 0x1c # CHECK: bgtz $6, 1332
95 0x1c 0x00 0xe9 0x02 # CHECK: dmult $23, $9
103 0xbb 0xe2 0x1c 0x00 # CHECK: dsra $gp, $gp, 10
106 0xbf 0xe2 0x1c 0x00 # CHECK: dsra32 $gp, $gp, 10
250 0x1c 0x00 0x7a 0x01 # CHECK: dmult $11, $26
252 0x78 0x1c 0x18 0x00 # CHECK: dsll $3, $24, 17
256 0x3a 0x56 0x1c 0x00 # CHECK: dsrl $10, $gp, 24
270 0xa4 0x38 0x1c 0x7c # CHECK: dsbh $7, $gp
|
| /external/llvm/test/MC/Disassembler/Mips/eva/ |
| D | valid_R6-eva.txt | 26 0x7d 0x51 0x80 0x1c # CHECK: sbe $17, -256($10)
27 0x7d 0xd3 0x00 0x1c # CHECK: sbe $19, 0($14)
|