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Searched refs:xreg (Results 1 – 9 of 9) sorted by relevance

/external/v8/src/arm64/
Dsimulator-arm64.cc170 return xreg(0); in CallInt64()
243 saved_registers[i] = xreg(register_list.PopLowestIndex().code()); in CheckPCSComplianceAndRun()
259 CHECK_EQ(saved_registers[i], xreg(register_list.PopLowestIndex().code())); in CheckPCSComplianceAndRun()
609 xreg(0), xreg(1), xreg(2), xreg(3), in DoRuntimeCall()
610 xreg(4), xreg(5), xreg(6), xreg(7)); in DoRuntimeCall()
611 ObjectPair result = target(xreg(0), xreg(1), xreg(2), xreg(3), in DoRuntimeCall()
612 xreg(4), xreg(5), xreg(6), xreg(7)); in DoRuntimeCall()
638 xreg(0), xreg(1), xreg(2), xreg(3), xreg(4), xreg(5), xreg(6), in DoRuntimeCall()
639 xreg(7)); in DoRuntimeCall()
641 ObjectTriple* sim_result = reinterpret_cast<ObjectTriple*>(xreg(8)); in DoRuntimeCall()
[all …]
Dsimulator-arm64.h348 int64_t xreg(unsigned code, Reg31Mode r31mode = Reg31IsZeroRegister) const {
405 int64_t sp() { return xreg(31, Reg31IsStackPointer); }
406 int64_t jssp() { return xreg(kJSSPCode, Reg31IsStackPointer); }
408 return xreg(kFramePointerRegCode, Reg31IsStackPointer);
/external/syslinux/com32/lib/sys/
Dfarcall.c26 com32sys_t xreg = *ireg; in __farcall() local
29 xreg.eflags.l = (xreg.eflags.l & ~EFLAGS_IF) | (eflags() & EFLAGS_IF); in __farcall()
31 __com32.cs_farcall((cs << 16) + ip, &xreg, oreg); in __farcall()
/external/syslinux/core/
Dcall16.c44 com32sys_t xreg = *ireg; in call16() local
47 xreg.eflags.l = (xreg.eflags.l & ~EFLAGS_IF) | (eflags() & EFLAGS_IF); in call16()
49 core_farcall((size_t)func, &xreg, oreg); in call16()
/external/vixl/test/aarch64/examples/
Dtest-examples.cc195 VIXL_CHECK(static_cast<uint64_t>(regs.xreg(0)) == FactorialC(N)); \
220 VIXL_CHECK(static_cast<uint64_t>(regs.xreg(0)) == FactorialC(N)); \
403 VIXL_CHECK(regs.xreg(0) == SumArrayC(Array, ARRAY_SIZE(Array))); \
431 VIXL_CHECK(regs.xreg(0) == abs(X)); \
464 VIXL_CHECK(regs.xreg(0) == chksum); in TEST()
486 VIXL_CHECK(regs.xreg(0) == d); in TEST()
487 VIXL_CHECK(regs.xreg(1) == c); in TEST()
488 VIXL_CHECK(regs.xreg(2) == b); in TEST()
489 VIXL_CHECK(regs.xreg(3) == a); in TEST()
518 VIXL_CHECK(regs.xreg(0) == ((Low <= Value) && (Value <= High))); \
[all …]
/external/vixl/test/aarch64/
Dtest-utils-aarch64.cc138 int64_t result_x = core->xreg(reg.GetCode()); in Equal32()
152 uint64_t result = core->xreg(reg.GetCode()); in Equal64()
199 int64_t expected = core->xreg(reg0.GetCode()); in Equal64()
200 int64_t result = core->xreg(reg1.GetCode()); in Equal64()
248 if (a->xreg(i) != b->xreg(i)) { in EqualRegisters()
251 a->xreg(i), in EqualRegisters()
252 b->xreg(i)); in EqualRegisters()
Dtest-utils-aarch64.h89 inline int64_t xreg(unsigned code) const { in xreg() function
Dtest-assembler-aarch64.cc2164 ASSERT_EQUAL_64(core.xreg(3) + kInstructionSize, x0); in TEST()
/external/vixl/src/aarch64/
Dsimulator-aarch64.h890 int64_t xreg(unsigned code,