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/external/r8/
DAndroid.mk4 d8-support-asm:deps/asm-5.1.jar \
5 d8-support-asm-common:deps/asm-commons-5.1.jar \
6 d8-support-asm-tree:deps/asm-tree-5.1.jar \
7 d8-support-asm-util:deps/asm-util-5.1.jar \
8 d8-support-common-compress:deps/commons-compress-1.12.jar \
9 d8-support-fastutil:deps/fastutil-7.2.0.jar \
10 d8-support-jopt:deps/jopt-simple-4.6.jar
14 LOCAL_MODULE := d8
18 d8-support-asm \
19 d8-support-asm-common \
[all …]
/external/curl/tests/data/
Dtest113867 …e/all/moo.html/?name=%d8%a2%d8%ba%d8%a7%d8%b2-%d8%b3%d9%85-%d8%b2%d8%af%d8%a7%db%8c%db%8c-%d8%a7%d…
/external/llvm/test/MC/ARM/
Dvpush-vpop.s6 vpush {d8, d9, d10, d11, d12}
8 vpop {d8, d9, d10, d11, d12}
11 vpush.s8 {d8, d9, d10, d11, d12}
13 vpop.f32 {d8, d9, d10, d11, d12}
16 @ CHECK-THUMB: vpush {d8, d9, d10, d11, d12} @ encoding: [0x2d,0xed,0x0a,0x8b]
18 @ CHECK-THUMB: vpop {d8, d9, d10, d11, d12} @ encoding: [0xbd,0xec,0x0a,0x8b]
21 @ CHECK-ARM: vpush {d8, d9, d10, d11, d12} @ encoding: [0x0a,0x8b,0x2d,0xed]
23 @ CHECK-ARM: vpop {d8, d9, d10, d11, d12} @ encoding: [0x0a,0x8b,0xbd,0xec]
26 @ CHECK-THUMB: vpush {d8, d9, d10, d11, d12} @ encoding: [0x2d,0xed,0x0a,0x8b]
28 @ CHECK-THUMB: vpop {d8, d9, d10, d11, d12} @ encoding: [0xbd,0xec,0x0a,0x8b]
[all …]
/external/libhevc/common/arm/
Dihevc_intra_pred_luma_mode_3_to_9.s132 vpush {d8 - d15}
193 vqmovn.s16 d8, q11
201 vsub.s8 d8, d8, d2 @ref_main_idx (sub row)
202 vsub.s8 d8, d26, d8 @ref_main_idx (row 0)
203 vadd.s8 d8, d8, d27 @t0 compensate the pu1_src idx incremented by 8
204 vsub.s8 d9, d8, d2 @ref_main_idx + 1 (row 0)
205 vtbl.8 d12, {d0,d1}, d8 @load from ref_main_idx (row 0)
209 vsub.s8 d4, d8, d2 @ref_main_idx (row 1)
217 vsub.s8 d8, d8, d3 @ref_main_idx (row 2)
222 vtbl.8 d14, {d0,d1}, d8 @load from ref_main_idx (row 2)
[all …]
Dihevc_itrans_recon_32x32.s163 vpush {d8 - d15}
213 vld1.16 d8,[r0],r6
217 vmull.s16 q12,d8,d0[1] @// y1 * cos1(part of b0)
218 vmull.s16 q13,d8,d0[3] @// y1 * cos3(part of b1)
219 vmull.s16 q14,d8,d1[1] @// y1 * sin3(part of b2)
220 vmull.s16 q15,d8,d1[3] @// y1 * sin1(part of b3)
282 vld1.16 d8,[r0],r6
287 vmlal.s16 q12,d8,d2[1] @// y1 * cos1(part of b0)
288 vmlal.s16 q13,d8,d6[3] @// y1 * cos3(part of b1)
289 vmlsl.s16 q14,d8,d4[3] @// y1 * sin3(part of b2)
[all …]
Dihevc_intra_pred_filters_luma_mode_11_to_17.s135 vpush {d8 - d15}
305 vqmovn.s16 d8, q11
312 vadd.s8 d8, d8, d27 @ref_main_idx (add row)
313 vsub.s8 d8, d8, d26 @ref_main_idx (row 0)
314 vadd.s8 d9, d8, d2 @ref_main_idx + 1 (row 0)
315 vtbl.8 d12, {d0,d1}, d8 @load from ref_main_idx (row 0)
319 vadd.s8 d4, d8, d2 @ref_main_idx (row 1)
327 vadd.s8 d8, d8, d3 @ref_main_idx (row 2)
332 vtbl.8 d14, {d0,d1}, d8 @load from ref_main_idx (row 2)
348 vadd.s8 d8, d8, d3 @ref_main_idx (row 4)
[all …]
Dihevc_intra_pred_chroma_mode_3_to_9.s129 vpush {d8 - d15}
185 vqmovn.s16 d8, q11
186 vshl.s8 d8, d8, #1 @ 2 * idx
197 vsub.s8 d8, d8, d27 @ref_main_idx (sub row)
198 vsub.s8 d8, d26, d8 @ref_main_idx (row 0)
199 vadd.s8 d8, d8, d9 @to compensate the pu1_src idx incremented by 8
200 vsub.s8 d9, d8, d29 @ref_main_idx + 1 (row 0)
201 vtbl.8 d12, {d0,d1,d2,d3}, d8 @load from ref_main_idx (row 0)
205 vsub.s8 d4, d8, d29 @ref_main_idx (row 1)
215 vsub.s8 d8, d8, d29 @ref_main_idx (row 2)
[all …]
Dihevc_itrans_recon_16x16.s138 vpush {d8 - d15}
232 vld1.16 d8,[r0],r8
270 vmlal.s16 q12,d8,d1[1]
271 vmlal.s16 q13,d8,d3[3]
272 vmlsl.s16 q14,d8,d1[3]
273 vmlsl.s16 q15,d8,d0[3]
312 vld1.16 d8,[r0],r5
330 vmlal.s16 q12,d8,d3[1]
331 vmlsl.s16 q13,d8,d1[3]
332 vmlal.s16 q14,d8,d0[1]
[all …]
Dihevc_intra_pred_filters_chroma_mode_11_to_17.s129 vpush {d8 - d15}
298 vqmovn.s16 d8, q11
299 vshl.s8 d8, d8, #1 @ 2 * idx
311 vadd.s8 d8, d8, d27 @ref_main_idx (add row)
312 vsub.s8 d8, d8, d26 @ref_main_idx (row 0)
313 vadd.s8 d9, d8, d29 @ref_main_idx + 1 (row 0)
314 vtbl.8 d12, {d0,d1,d2,d3}, d8 @load from ref_main_idx (row 0)
318 vadd.s8 d4, d8, d29 @ref_main_idx (row 1)
329 vadd.s8 d8, d8, d29 @ref_main_idx (row 2)
334 vtbl.8 d14, {d0,d1,d2,d3}, d8 @load from ref_main_idx (row 2)
[all …]
Dihevc_intra_pred_luma_planar.s119 vpush {d8 - d15}
184 vld1.s8 d8, [r12] @(1-8)load 8 coeffs [col+1]
187 vsub.s8 d9, d2, d8 @(1-8)[nt-1-col]
193 vmlal.u8 q6, d8, d1 @(1)(col+1) * src[3nt+1]
210 vmlal.u8 q15, d8, d1 @(2)
224 vmlal.u8 q14, d8, d1 @(3)
241 vmlal.u8 q5, d8, d1 @(4)
258 vmlal.u8 q8, d8, d1 @(5)
274 vmlal.u8 q9, d8, d1 @(6)
291 vmlal.u8 q13, d8, d1 @(7)
[all …]
Dihevc_intra_pred_chroma_planar.s114 vpush {d8 - d15}
171 vld1.s8 d8, [r12]!
172 vmov d9,d8
173 vzip.8 d8,d9
174 vsub.s8 d30, d2, d8 @[nt-1-col]
187 vmlal.u8 q6, d8, d1 @(col+1) * src[3nt+1]
208 vmlal.u8 q13, d8, d1 @(col+1) * src[3nt+1]
234 vmlal.u8 q11, d8, d1 @(col+1) * src[3nt+1]
255 vmlal.u8 q6, d8, d1 @(col+1) * src[3nt+1]
319 vld1.s8 d8, [r12]!
[all …]
/external/llvm/test/CodeGen/ARM/
Dcfi-alignment.ll11 ; CHECK: vpush {d8, d9}
14 ; CHECK: .cfi_offset d8, -32
15 call void asm sideeffect "", "~{d8},~{d9},~{d11}"()
27 ; CHECK: vpush {d8, d9}
30 ; CHECK: .cfi_offset d8, -48
31 call void asm sideeffect "", "~{d8},~{d9},~{d11}"()
40 ; CHECK: vpush {d8, d9}
42 call void asm sideeffect "", "~{d8},~{d9}"()
Dv7k-abi-align.ll35 ; CHECK: vpush {d8, d9}
37 ; CHECK: .cfi_offset d8, -32
41 ; CHECK: vpop {d8, d9}
45 call void asm sideeffect "", "~{r6},~{d8},~{d9}"()
53 ; adjustment needs to be performed to put d8 and d9 where they should be.
60 ; CHECK: vpush {d8, d9}
62 ; CHECK: .cfi_offset d8, -48
66 ; CHECK: vpop {d8, d9}
71 call void asm sideeffect "", "~{r4},~{r5},~{r6},~{r7},~{r8},~{d8},~{d9}"()
83 ; CHECK: vpush {d8, d9}
[all …]
/external/v8/tools/
Dcheck-static-initializers.sh40 d8="${v8_root}/$1"
42 d8="${v8_root}/d8"
45 if [ ! -f "$d8" ]; then
46 echo "d8 binary not found: $d8"
50 static_inits=$(nm "$d8" | grep _GLOBAL_ | grep _I_ | awk '{ print $NF; }')
Dfuzz-harness.sh42 d8="${v8_root}/$1"
44 d8="${v8_root}/d8"
47 if [ ! -f "$d8" ]; then
48 echo "Failed to find d8 binary: $d8"
92 "$d8" $flags "$jsfunfuzz_dir/jsfunfuzz/jsfunfuzz.js"
/external/llvm/test/MC/Disassembler/ARM/
Dneont2.txt1642 # CHECK: vst1.8 {d8}, [r4]!
1644 # CHECK: vst1.16 {d8}, [r4]!
1646 # CHECK: vst1.32 {d8}, [r4]!
1648 # CHECK: vst1.64 {d8}, [r4]!
1650 # CHECK: vst1.8 {d8}, [r4], r6
1652 # CHECK: vst1.16 {d8}, [r4], r6
1654 # CHECK: vst1.32 {d8}, [r4], r6
1656 # CHECK: vst1.64 {d8}, [r4], r6
1659 # CHECK: vst1.8 {d8, d9}, [r4]!
1661 # CHECK: vst1.16 {d8, d9}, [r4]!
[all …]
Dneon.txt1936 # CHECK: vst1.8 {d8}, [r4]!
1938 # CHECK: vst1.16 {d8}, [r4]!
1940 # CHECK: vst1.32 {d8}, [r4]!
1942 # CHECK: vst1.64 {d8}, [r4]!
1944 # CHECK: vst1.8 {d8}, [r4], r6
1946 # CHECK: vst1.16 {d8}, [r4], r6
1948 # CHECK: vst1.32 {d8}, [r4], r6
1950 # CHECK: vst1.64 {d8}, [r4], r6
1953 # CHECK: vst1.8 {d8, d9}, [r4]!
1955 # CHECK: vst1.16 {d8, d9}, [r4]!
[all …]
/external/autotest/server/cros/
Drf_switch_1_ap_box_1_ap_list.conf109 [a4:2b:b0:cd:2a:d8]
115 bss5 = a4:2b:b0:cd:2a:d8
122 [d8:eb:97:2e:ac:44]
128 bss = d8:eb:97:2e:ac:44
129 wan mac = d8:eb:97:2e:ac:45
135 [d8:eb:97:2e:ac:46]
141 bss5 = d8:eb:97:2e:ac:46
142 wan mac = d8:eb:97:2e:ac:45
174 [d8:eb:97:ec:37:c3]
180 bss = d8:eb:97:ec:37:c3
[all …]
/external/libhevc/decoder/arm/
Dihevcd_itrans_recon_dc_chroma.s61 vpush {d8-d15}
95 vld2.8 {d8,d9},[r7],r2
108 vaddw.u8 q12,q0,d8
118 vqmovun.s16 d8,q12
130 vst2.8 {d8,d9},[r11],r3
162 vld2.8 {d8,d9},[r0]
170 vaddw.u8 q12,q0,d8
177 vqmovun.s16 d8,q12
183 vzip.8 d8,d9
188 vst1.u32 {d8},[r1]
[all …]
/external/swiftshader/third_party/LLVM/test/MC/ARM/
Dvpush-vpop.s6 vpush {d8, d9, d10, d11, d12}
8 vpop {d8, d9, d10, d11, d12}
11 @ CHECK-THUMB: vpush {d8, d9, d10, d11, d12} @ encoding: [0x2d,0xed,0x0a,0x8b]
13 @ CHECK-THUMB: vpop {d8, d9, d10, d11, d12} @ encoding: [0xbd,0xec,0x0a,0x8b]
16 @ CHECK-ARM: vpush {d8, d9, d10, d11, d12} @ encoding: [0x0a,0x8b,0x2d,0xed]
18 @ CHECK-ARM: vpop {d8, d9, d10, d11, d12} @ encoding: [0x0a,0x8b,0xbd,0xec]
/external/v8/src/
Dd8.gyp38 'target_name': 'd8',
51 'd8.h',
52 'd8.cc',
53 '<(SHARED_INTERMEDIATE_DIR)/d8-js.cc',
69 'sources': [ 'd8-posix.cc', ]
72 'sources': [ 'd8-windows.cc', ]
108 'd8.js',
127 '<(SHARED_INTERMEDIATE_DIR)/d8-js.cc',
147 'd8',
153 'd8.isolate',
/external/libavc/encoder/arm/
Dime_distortion_metrics_a9q.s91 vpush {d8-d15}
101 vld1.8 {d8, d9}, [r0], r2
109 vabal.u8 q0, d10, d8
113 vld1.8 {d8, d9}, [r0], r2
120 vabal.u8 q0, d10, d8
125 vpop {d8-d15}
183 vpush {d8-d15}
184 vld1.8 {d8, d9}, [r0], r2
192 vabal.u8 q0, d10, d8
196 vld1.8 {d8, d9}, [r0], r2
[all …]
/external/v8/
DAndroid.d8.mk6 LOCAL_MODULE := d8
10 src/d8.cc \
11 src/d8-posix.cc
14 $(LOCAL_PATH)/src/d8.js \
26 D8_GEN := $(generated_sources)/d8-js.cc
/external/v8/tools/jsfunfuzz/
Dfuzz-harness.sh20 d8="${v8_root}/$1"
22 d8="${v8_root}/d8"
25 if [ ! -f "$d8" ]; then
26 echo "Failed to find d8 binary: $d8"
70 "$d8" $flags "$jsfunfuzz_dir/jsfunfuzz/jsfunfuzz.js"
/external/llvm/test/CodeGen/Thumb2/
Daligned-spill.ll17 …tail call void asm sideeffect "", "~{d8},~{d9},~{d10},~{d11},~{d12},~{d13},~{d14},~{d15}"() nounwi…
29 ; NEON: vst1.64 {d8, d9, d10, d11}, [r4:128]!
39 ; NEON: vld1.64 {d8, d9, d10, d11}, [r[[R4]]:128]!
50 tail call void asm sideeffect "", "~{d8},~{d9},~{d10},~{d11},~{d12},~{d13},~{d14}"() nounwind
60 ; NEON: vst1.64 {d8, d9, d10, d11}, [r4:128]!
64 ; NEON: vld1.64 {d8, d9, d10, d11},
74 tail call void asm sideeffect "", "~{d8},~{d9},~{d10},~{d12},~{d13},~{d14},~{d15}"() nounwind
78 ; Aligned spilling only works for contiguous ranges starting from d8.
87 ; NEON: vst1.64 {d8, d9}, [r4:128]
90 ; NEON: vld1.64 {d8, d9},

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