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Searched refs:ADD2 (Results 1 – 25 of 26) sorted by relevance

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/external/libvpx/libvpx/vpx_dsp/mips/
Dfwd_dct32x32_msa.c89 ADD2(vec4, vec5, vec7, vec6, vec0, vec1); in fdct8x32_1d_column_even_store()
105 ADD2(in0, in1, in2, in3, vec0, vec7); in fdct8x32_1d_column_even_store()
125 ADD2(in3, in2, in0, in1, vec3, vec4); in fdct8x32_1d_column_even_store()
186 ADD2(in27, in26, in25, in24, in23, in20); in fdct8x32_1d_column_odd_store()
206 ADD2(in26, in27, in24, in25, in22, in21); in fdct8x32_1d_column_odd_store()
220 ADD2(in28, in29, in31, in30, in16, in19); in fdct8x32_1d_column_odd_store()
239 ADD2(in29, in28, in30, in31, in17, in18); in fdct8x32_1d_column_odd_store()
347 ADD2(vec4, vec5, vec7, vec6, vec0, vec1); in fdct8x32_1d_row_even_4x()
364 ADD2(in0, in1, in2, in3, vec0, vec7); in fdct8x32_1d_row_even_4x()
384 ADD2(in3, in2, in0, in1, vec3, vec4); in fdct8x32_1d_row_even_4x()
[all …]
Didct16x16_msa.c388 ADD2(res0, out0, res1, out1, res0, res1); in vpx_iadst16_1d_columns_addblk_msa()
405 ADD2(res8, out8, res9, out9, res8, res9); in vpx_iadst16_1d_columns_addblk_msa()
420 ADD2(res4, out4, res5, out5, res4, res5); in vpx_iadst16_1d_columns_addblk_msa()
432 ADD2(res12, out12, res13, out13, res12, res13); in vpx_iadst16_1d_columns_addblk_msa()
445 ADD2(res6, out6, res7, out7, res6, res7); in vpx_iadst16_1d_columns_addblk_msa()
456 ADD2(res10, out10, res11, out11, res10, res11); in vpx_iadst16_1d_columns_addblk_msa()
469 ADD2(res2, out2, res3, out3, res2, res3); in vpx_iadst16_1d_columns_addblk_msa()
480 ADD2(res14, out14, res15, out15, res14, res15); in vpx_iadst16_1d_columns_addblk_msa()
Dfwd_txfm_msa.c106 ADD2(stp34, stp25, stp33, stp22, in13, in10); in fdct8x16_1d_column()
224 ADD2(in0, in2, in4, in6, in0, in4); in vpx_fdct8x8_1_msa()
262 ADD2(in0, in2, in4, in6, in0, in4); in vpx_fdct16x16_1_msa()
Dmacros_msa.h1678 #define ADD2(in0, in1, in2, in3, out0, out1) \ macro
1685 ADD2(in0, in1, in2, in3, out0, out1); \
1686 ADD2(in4, in5, in6, in7, out2, out3); \
2012 ADD2(res0_m, inp0_m, res1_m, inp1_m, res0_m, res1_m); \
Didct32x32_msa.c156 ADD2(reg5, reg4, reg3, reg2, vec0, vec1); in idct32x8_row_odd_process_store()
462 ADD2(reg5, reg4, reg3, reg2, vec0, vec1); in idct8x32_column_odd_process_store()
Ddeblock_msa.c685 ADD2(sum0_h, dst_r_h, sum1_h, dst_l_h, sum0_h, sum1_h); in vpx_mbpost_proc_down_msa()
Davg_msa.c25 ADD2(sum0, sum2, sum4, sum6, sum0, sum4); in vpx_avg_8x8_msa()
/external/libvpx/libvpx/vp8/encoder/mips/msa/
Ddenoising_msa.c111 ADD2(col_sum0, adjust0, col_sum1, adjust1, col_sum0, col_sum1); in vp8_denoiser_filter_msa()
113 ADD2(temp0_h, adjust0, temp1_h, adjust1, temp0_h, temp1_h); in vp8_denoiser_filter_msa()
159 ADD2(col_sum0, adjust0, col_sum1, adjust1, col_sum0, col_sum1); in vp8_denoiser_filter_msa()
161 ADD2(temp0_h, adjust0, temp1_h, adjust1, temp0_h, temp1_h); in vp8_denoiser_filter_msa()
224 ADD2(temp2_h, adjust0, temp3_h, adjust1, adjust2, adjust3); in vp8_denoiser_filter_msa()
237 ADD2(col_sum2, adjust0, col_sum3, adjust1, col_sum2, col_sum3); in vp8_denoiser_filter_msa()
258 ADD2(temp2_h, adjust0, temp3_h, adjust1, adjust2, adjust3); in vp8_denoiser_filter_msa()
271 ADD2(col_sum2, adjust0, col_sum3, adjust1, col_sum2, col_sum3); in vp8_denoiser_filter_msa()
Dtemporal_filter_msa.c66 ADD2(mod0_h, cnt0, mod1_h, cnt1, mod0_h, mod1_h); in temporal_filter_apply_16size_msa()
104 ADD2(mod0_h, cnt0, mod1_h, cnt1, mod0_h, mod1_h); in temporal_filter_apply_16size_msa()
186 ADD2(mod0_h, cnt0, mod1_h, cnt1, mod0_h, mod1_h); in temporal_filter_apply_8size_msa()
226 ADD2(mod0_h, cnt0, mod1_h, cnt1, mod0_h, mod1_h); in temporal_filter_apply_8size_msa()
Dencodeopt_msa.c149 ADD2(err0, err_dup0, err1, err_dup1, err0, err1); in vp8_mbuverror_msa()
161 ADD2(err0, err_dup0, err1, err_dup1, err0, err1); in vp8_mbuverror_msa()
Dquantize_msa.c136 ADD2(x0, round0, x1, round1, x0, x1); in exact_regular_quantize_b_msa()
/external/swiftshader/third_party/subzero/tests_lit/llvm2ice_tests/
Dmips-legalization.ll76 ; MIPS32: addu [[ADD2:.*]],[[TMP_B]],[[TMP_E]]
77 ; MIPS32: sw [[ADD2]],28(sp)
/external/libpng/mips/
Dfilter_msa_intrinsics.c280 #define ADD2(in0, in1, in2, in3, out0, out1) \ macro
288 ADD2(in0, in1, in2, in3, out0, out1); \
294 ADD2(in0, in1, in2, in3, out0, out1); \
295 ADD2(in4, in5, in6, in7, out2, out3); \
427 ADD2(src0, src4, src1, src5, src0, src1); in png_read_filter_row_up_msa()
438 ADD2(src0, src4, src1, src5, src0, src1); in png_read_filter_row_up_msa()
/external/llvm/test/CodeGen/AArch64/
Daddsub.ll47 ; CHECK: add [[ADD2:x[0-9]+]], x[[LOAD32]], #12
51 ; CHECK: str [[ADD2]], [x1]
/external/webp/src/dsp/
Dlossless_msa.c94 ADD2(t0, t2, t1, t3, t0, t1); \
260 ADD2(src0, tmp0, src1, tmp1, dst0, dst1); in AddGreenToBlueAndRed()
Dfilters_msa.c114 ADD2(a0, b0, a1, b1, a0, a1); in PredictLineGradient()
Dmsa_macro.h1167 #define ADD2(in0, in1, in2, in3, out0, out1) do { \ macro
1174 ADD2(in0, in1, in2, in3, out0, out1); \
1175 ADD2(in4, in5, in6, in7, out2, out3); \
1359 ADD2(res0_m, inp0_m, res1_m, inp1_m, res0_m, res1_m); \
/external/llvm/test/CodeGen/AMDGPU/
Dds_read2_superreg.ll43 ; CI: v_add_f32_e32 v[[ADD2:[0-9]+]], v[[ADD1]], v[[ADD0]]
44 ; CI: buffer_store_dword v[[ADD2]]
/external/libvpx/libvpx/vp8/common/mips/msa/
Dvp8_macros_msa.h1451 #define ADD2(in0, in1, in2, in3, out0, out1) \ macro
1458 ADD2(in0, in1, in2, in3, out0, out1); \
1459 ADD2(in4, in5, in6, in7, out2, out3); \
Didct_msa.c157 ADD2(tmp0, 3, tmp1, 3, out0, out1); in vp8_short_inv_walsh4x4_msa()
/external/boringssl/mac-x86_64/crypto/fipsmodule/
Dbsaes-x86_64.S2472 L$ADD2:
/external/boringssl/win-x86_64/crypto/fipsmodule/
Dbsaes-x86_64.asm2575 $L$ADD2:
/external/icu/icu4c/source/test/testdata/
DNormalizationTest-3.2.0.txt2721 ADD2;ADD2;1100 1171 11B9;ADD2;1100 1171 11B9;
/external/icu/icu4c/source/data/unidata/
DNormalizationTest.txt2883 ADD2;ADD2;1100 1171 11B9;ADD2;1100 1171 11B9;
/external/icu/icu4j/main/tests/core/src/com/ibm/icu/dev/data/unicode/
DNormalizationTest.txt2883 ADD2;ADD2;1100 1171 11B9;ADD2;1100 1171 11B9;

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