| /external/llvm/lib/Target/X86/ |
| D | X86TargetTransformInfo.cpp | 949 { ISD::BITREVERSE, MVT::v4i64, 4 }, in getIntrinsicInstrCost()
950 { ISD::BITREVERSE, MVT::v8i32, 4 }, in getIntrinsicInstrCost()
951 { ISD::BITREVERSE, MVT::v16i16, 4 }, in getIntrinsicInstrCost()
952 { ISD::BITREVERSE, MVT::v32i8, 4 }, in getIntrinsicInstrCost()
953 { ISD::BITREVERSE, MVT::v2i64, 1 }, in getIntrinsicInstrCost()
954 { ISD::BITREVERSE, MVT::v4i32, 1 }, in getIntrinsicInstrCost()
955 { ISD::BITREVERSE, MVT::v8i16, 1 }, in getIntrinsicInstrCost()
956 { ISD::BITREVERSE, MVT::v16i8, 1 }, in getIntrinsicInstrCost()
957 { ISD::BITREVERSE, MVT::i64, 3 }, in getIntrinsicInstrCost()
958 { ISD::BITREVERSE, MVT::i32, 3 }, in getIntrinsicInstrCost()
[all …]
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| D | X86ISelLowering.cpp | 872 setOperationAction(ISD::BITREVERSE, MVT::v16i8, Custom); in X86TargetLowering()
939 setOperationAction(ISD::BITREVERSE, VT, Custom); in X86TargetLowering()
943 setOperationAction(ISD::BITREVERSE, VT, Custom); in X86TargetLowering()
1009 setOperationAction(ISD::BITREVERSE, MVT::v32i8, Custom); in X86TargetLowering()
1470 setOperationAction(ISD::BITREVERSE, MVT::v64i8, Custom); in X86TargetLowering()
21075 Res = DAG.getNode(ISD::BITREVERSE, DL, VecVT, Res); in LowerBITREVERSE_XOP()
21091 DAG.getNode(ISD::BITREVERSE, DL, HalfVT, Lo), in LowerBITREVERSE_XOP()
21092 DAG.getNode(ISD::BITREVERSE, DL, HalfVT, Hi)); in LowerBITREVERSE_XOP()
21138 Lo = DAG.getNode(ISD::BITREVERSE, DL, HalfVT, Lo); in LowerBITREVERSE()
21139 Hi = DAG.getNode(ISD::BITREVERSE, DL, HalfVT, Hi); in LowerBITREVERSE()
[all …]
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorOps.cpp | 285 case ISD::BITREVERSE: in LegalizeOp()
699 case ISD::BITREVERSE: in Expand()
892 if (TLI.isOperationLegalOrCustom(ISD::BITREVERSE, VT.getScalarType())) in ExpandBITREVERSE()
905 (TLI.isOperationLegalOrCustom(ISD::BITREVERSE, ByteVT) || in ExpandBITREVERSE()
914 Op = DAG.getNode(ISD::BITREVERSE, DL, ByteVT, Op); in ExpandBITREVERSE()
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| D | SelectionDAGDumper.cpp | 316 case ISD::BITREVERSE: return "bitreverse"; in getOperationName()
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| D | LegalizeIntegerTypes.cpp | 56 case ISD::BITREVERSE: Res = PromoteIntRes_BITREVERSE(N); break; in PromoteIntegerResult()
333 ISD::SRL, dl, NVT, DAG.getNode(ISD::BITREVERSE, dl, NVT, Op), in PromoteIntRes_BITREVERSE()
1314 case ISD::BITREVERSE: ExpandIntRes_BITREVERSE(N, Lo, Hi); break; in ExpandIntegerResult()
1933 Lo = DAG.getNode(ISD::BITREVERSE, dl, Lo.getValueType(), Lo); in ExpandIntRes_BITREVERSE()
1934 Hi = DAG.getNode(ISD::BITREVERSE, dl, Hi.getValueType(), Hi); in ExpandIntRes_BITREVERSE()
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| D | LegalizeVectorTypes.cpp | 70 case ISD::BITREVERSE: in ScalarizeVectorResult()
627 case ISD::BITREVERSE: in SplitVectorResult()
2148 case ISD::BITREVERSE: in WidenVectorResult()
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| D | LegalizeDAG.cpp | 2755 case ISD::BITREVERSE: in ExpandNode()
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| D | DAGCombiner.cpp | 1384 case ISD::BITREVERSE: return visitBITREVERSE(N); in visit()
4978 if (N0.getOpcode() == ISD::BITREVERSE) in visitBITREVERSE()
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| D | SelectionDAG.cpp | 3159 case ISD::BITREVERSE: in getNode()
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| D | SelectionDAGBuilder.cpp | 5291 setValue(&I, DAG.getNode(ISD::BITREVERSE, sdl, in visitIntrinsicCall()
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| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 342 BSWAP, CTTZ, CTLZ, CTPOP, BITREVERSE, enumerator
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| /external/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 890 setOperationAction(ISD::BITREVERSE, VT, Expand); in initActions()
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| D | CodeGenPrepare.cpp | 5303 !TLI.isOperationLegalOrCustom(ISD::BITREVERSE, in makeBitReverse()
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 409 def bitreverse : SDNode<"ISD::BITREVERSE" , SDTIntUnaryOp>;
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 199 setOperationAction(ISD::BITREVERSE, MVT::i32, Legal); in SITargetLowering()
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| D | AMDGPUISelLowering.cpp | 946 return DAG.getNode(ISD::BITREVERSE, DL, VT, Op.getOperand(1)); in LowerINTRINSIC_WO_CHAIN()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 751 setOperationAction(ISD::BITREVERSE, MVT::i32, Legal); in ARMTargetLowering()
2929 return DAG.getNode(ISD::BITREVERSE, dl, MVT::i32, Op.getOperand(1)); in LowerINTRINSIC_WO_CHAIN()
4685 SDValue rbit = DAG.getNode(ISD::BITREVERSE, dl, VT, N->getOperand(0)); in LowerCTTZ()
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