Searched refs:DSRLV (Results 1 – 10 of 10) sorted by relevance
/external/valgrind/none/tests/mips64/ |
D | shift_instructions.c | 8 DSRAV, DSRL, DSRL32, DSRLV, enumerator 136 case DSRLV: in main()
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/external/v8/src/mips64/ |
D | constants-mips64.h | 418 DSRLV = ((2U << 3) + 6), enumerator 969 FunctionFieldToBitNumber(SRLV) | FunctionFieldToBitNumber(DSRLV) |
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D | disasm-mips64.cc | 1226 case DSRLV: in DecodeTypeRegisterSPECIAL()
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D | assembler-mips64.cc | 1871 GenInstrRegister(SPECIAL, rs, rt, rd, 0, DSRLV); in dsrlv() 1892 | (rd.code() << kRdShift) | (1 << kSaShift) | DSRLV; in drotrv()
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D | simulator-mips64.cc | 3662 case DSRLV: in DecodeTypeRegisterSPECIAL()
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/external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
D | Mips64InstrInfo.td | 123 def DSRLV : LogicR_shift_rotate_reg64<0x26, 0x00, "dsrlv", srl>;
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/external/llvm/lib/Target/Mips/ |
D | Mips64InstrInfo.td | 153 def DSRLV : StdMMR6Rel, shift_rotate_reg<"dsrlv", GPR64Opnd, II_DSRLV, srl>, 577 (DSRLV GPR64:$rt, (EXTRACT_SUBREG GPR64:$rs, sub_32))>; 696 (DSRLV GPR64Opnd:$rd, GPR64Opnd:$rt, GPR32Opnd:$rs), 0>,
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/external/pcre/dist2/src/sljit/ |
D | sljitNativeMIPS_64.c | 427 EMIT_SHIFT(DSRL, DSRL32, SRL, DSRLV, SRLV); in emit_single_op()
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D | sljitNativeMIPS_common.c | 138 #define DSRLV (HI(0) | LO(22)) macro
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/external/llvm/lib/Target/Mips/AsmParser/ |
D | MipsAsmParser.cpp | 3551 FirstShift = Mips::DSRLV; in expandDRotation() 3556 SecondShift = Mips::DSRLV; in expandDRotation()
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