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Searched refs:DSRLV (Results 1 – 10 of 10) sorted by relevance

/external/valgrind/none/tests/mips64/
Dshift_instructions.c8 DSRAV, DSRL, DSRL32, DSRLV, enumerator
136 case DSRLV: in main()
/external/v8/src/mips64/
Dconstants-mips64.h418 DSRLV = ((2U << 3) + 6), enumerator
969 FunctionFieldToBitNumber(SRLV) | FunctionFieldToBitNumber(DSRLV) |
Ddisasm-mips64.cc1226 case DSRLV: in DecodeTypeRegisterSPECIAL()
Dassembler-mips64.cc1871 GenInstrRegister(SPECIAL, rs, rt, rd, 0, DSRLV); in dsrlv()
1892 | (rd.code() << kRdShift) | (1 << kSaShift) | DSRLV; in drotrv()
Dsimulator-mips64.cc3662 case DSRLV: in DecodeTypeRegisterSPECIAL()
/external/swiftshader/third_party/LLVM/lib/Target/Mips/
DMips64InstrInfo.td123 def DSRLV : LogicR_shift_rotate_reg64<0x26, 0x00, "dsrlv", srl>;
/external/llvm/lib/Target/Mips/
DMips64InstrInfo.td153 def DSRLV : StdMMR6Rel, shift_rotate_reg<"dsrlv", GPR64Opnd, II_DSRLV, srl>,
577 (DSRLV GPR64:$rt, (EXTRACT_SUBREG GPR64:$rs, sub_32))>;
696 (DSRLV GPR64Opnd:$rd, GPR64Opnd:$rt, GPR32Opnd:$rs), 0>,
/external/pcre/dist2/src/sljit/
DsljitNativeMIPS_64.c427 EMIT_SHIFT(DSRL, DSRL32, SRL, DSRLV, SRLV); in emit_single_op()
DsljitNativeMIPS_common.c138 #define DSRLV (HI(0) | LO(22)) macro
/external/llvm/lib/Target/Mips/AsmParser/
DMipsAsmParser.cpp3551 FirstShift = Mips::DSRLV; in expandDRotation()
3556 SecondShift = Mips::DSRLV; in expandDRotation()