Searched refs:FIOp (Results 1 – 2 of 2) sorted by relevance
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonRegisterInfo.cpp | 159 int SPAdj, unsigned FIOp, in eliminateFrameIndex() argument
173 int FI = MI.getOperand(FIOp).getIndex(); in eliminateFrameIndex()
178 int RealOffset = Offset + MI.getOperand(FIOp+1).getImm(); in eliminateFrameIndex()
185 MI.getOperand(FIOp).ChangeToImmediate(RealOffset); in eliminateFrameIndex()
186 MI.RemoveOperand(FIOp+1); in eliminateFrameIndex()
208 MI.getOperand(FIOp).ChangeToRegister(BP, false, false, IsKill); in eliminateFrameIndex()
209 MI.getOperand(FIOp+1).ChangeToImmediate(RealOffset); in eliminateFrameIndex()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIRegisterInfo.cpp | 324 MachineOperand *FIOp = TII->getNamedOperand(MI, AMDGPU::OpName::vaddr); in resolveFrameIndex() local
325 assert(FIOp && FIOp->isFI() && "frame index must be address operand"); in resolveFrameIndex()
333 FIOp->ChangeToRegister(BaseReg, false); in resolveFrameIndex()
358 FIOp->ChangeToRegister(NewReg, false); in resolveFrameIndex()
507 MachineOperand &FIOp = MI->getOperand(FIOperandNum); in eliminateFrameIndex() local
666 FIOp.ChangeToImmediate(Offset); in eliminateFrameIndex()
667 if (!TII->isImmOperandLegal(*MI, FIOperandNum, FIOp)) { in eliminateFrameIndex()
672 FIOp.ChangeToRegister(TmpReg, false, false, true); in eliminateFrameIndex()
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