Searched refs:INSTR (Results 1 – 5 of 5) sorted by relevance
| /external/mesa3d/src/gallium/drivers/freedreno/a2xx/ |
| D | disasm-a2xx.c | 129 #define INSTR(opc, num_srcs) [opc] = { num_srcs, #opc } macro
130 INSTR(ADDv, 2),
131 INSTR(MULv, 2),
132 INSTR(MAXv, 2),
133 INSTR(MINv, 2),
134 INSTR(SETEv, 2),
135 INSTR(SETGTv, 2),
136 INSTR(SETGTEv, 2),
137 INSTR(SETNEv, 2),
138 INSTR(FRACv, 1),
[all …]
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| /external/llvm/test/MC/Mips/ |
| D | hilo-addressing.s | 5 # RUN: | llvm-objdump -disassemble - | FileCheck %s -check-prefix=CHECK-INSTR
29 # CHECK-INSTR: lui $4, 3
30 # CHECK-INSTR: addiu $4, $4, 292
35 # CHECK-INSTR: lui $5, 0
36 # CHECK-INSTR: lw $5, -8($5)
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| /external/swiftshader/third_party/LLVM/test/CodeGen/ARM/ |
| D | trap.ll | 1 ; RUN: llc < %s -mtriple=arm-apple-darwin | FileCheck %s -check-prefix=INSTR
8 ; INSTR: t:
9 ; INSTR: trap
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| /external/mesa3d/src/gallium/drivers/etnaviv/ |
| D | etnaviv_compiler.c | 1737 #define INSTR(n, f, ...) \ macro
1740 INSTR(MOV, trans_instr, .opc = INST_OPCODE_MOV, .src = {2, -1, -1}),
1741 INSTR(RCP, trans_instr, .opc = INST_OPCODE_RCP, .src = {2, -1, -1}),
1742 INSTR(RSQ, trans_instr, .opc = INST_OPCODE_RSQ, .src = {2, -1, -1}),
1743 INSTR(MUL, trans_instr, .opc = INST_OPCODE_MUL, .src = {0, 1, -1}),
1744 INSTR(ADD, trans_instr, .opc = INST_OPCODE_ADD, .src = {0, 2, -1}),
1745 INSTR(DP3, trans_instr, .opc = INST_OPCODE_DP3, .src = {0, 1, -1}),
1746 INSTR(DP4, trans_instr, .opc = INST_OPCODE_DP4, .src = {0, 1, -1}),
1747 INSTR(DST, trans_instr, .opc = INST_OPCODE_DST, .src = {0, 1, -1}),
1748 INSTR(MAD, trans_instr, .opc = INST_OPCODE_MAD, .src = {0, 1, 2}),
[all …]
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| /external/webp/src/dsp/ |
| D | msa_macro.h | 70 #define MSA_LOAD_FUNC(TYPE, INSTR, FUNC_NAME) \ argument
75 "" #INSTR " %[val_m], %[psrc_m] \n\t" \
83 #define MSA_STORE_FUNC(TYPE, INSTR, FUNC_NAME) \ argument
88 " " #INSTR " %[val_m], %[pdst_m] \n\t" \
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