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Searched refs:Imm32 (Results 1 – 9 of 9) sorted by relevance

/external/swiftshader/third_party/LLVM/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h319 Imm32 = 5 << ImmShift, enumerator
434 case X86II::Imm32: in getSizeOfImm()
451 case X86II::Imm32: in isImmPCRel()
/external/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h408 Imm32 = 5 << ImmShift, enumerator
581 case X86II::Imm32: in getSizeOfImm()
599 case X86II::Imm32: in isImmPCRel()
617 case X86II::Imm32: in isImmSigned()
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86InstrFormats.td58 def Imm32 : ImmType<5>;
209 : X86Inst<o, f, Imm32, outs, ins, asm> {
253 list<dag> pattern> : X86Inst<o, f, Imm32, outs, ins, asm> {
DX86InstrArithmetic.td528 /// example, i8 -> Imm8, i16 -> Imm16, i32 -> Imm32. Note that i64 -> Imm32
576 Imm32, i32imm, imm, i32i8imm, i32immSExt8,
579 Imm32, i64i32imm, i64immSExt32, i64i8imm, i64immSExt8,
/external/valgrind/VEX/priv/
Dhost_arm_defs.c1132 i->ARMin.Imm32.dst = dst; in ARMInstr_Imm32()
1133 i->ARMin.Imm32.imm32 = imm32; in ARMInstr_Imm32()
1608 ppHRegARM(i->ARMin.Imm32.dst); in ppARMInstr()
1609 vex_printf(", 0x%x", i->ARMin.Imm32.imm32); in ppARMInstr()
2107 addHRegUse(u, HRmWrite, i->ARMin.Imm32.dst); in getRegUsage_ARMInstr()
2432 i->ARMin.Imm32.dst = lookupHRegRemap(m, i->ARMin.Imm32.dst); in mapRegs_ARMInstr()
3177 p = imm32_to_ireg( (UInt*)p, iregEnc(i->ARMin.Imm32.dst), in emit_ARMInstr()
3178 i->ARMin.Imm32.imm32 ); in emit_ARMInstr()
Dhost_arm_defs.h669 } Imm32; member
/external/llvm/lib/Target/X86/
DX86InstrFormats.td70 def Imm32 : ImmType<5>;
368 : X86Inst<o, f, Imm32, outs, ins, asm, itin> {
422 : X86Inst<o, f, Imm32, outs, ins, asm, itin> {
DX86InstrArithmetic.td576 /// example, i8 -> Imm8, i16 -> Imm16, i32 -> Imm32. Note that i64 -> Imm32
625 Imm32, i32imm, imm32_su, i32i8imm, i32immSExt8_su,
/external/llvm/lib/Target/ARM/
DARMInstrInfo.td658 def Imm32AsmOperand: ImmAsmOperand { let Name = "Imm32"; }