Searched refs:Inp (Results 1 – 5 of 5) sorted by relevance
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonBitSimplify.cpp | 1464 bool findMatch(const BitTracker::RegisterRef &Inp,
1489 bool CopyGeneration::findMatch(const BitTracker::RegisterRef &Inp, in findMatch() argument
1491 if (!BT.has(Inp.Reg)) in findMatch()
1493 const BitTracker::RegisterCell &InpRC = BT.lookup(Inp.Reg); in findMatch()
1495 if (!HBS::getSubregMask(Inp, B, W, MRI)) in findMatch()
1499 if (!BT.has(R) || !HBS::isTransparentCopy(R, Inp, MRI)) in findMatch()
1504 if (MRI.getRegClass(Inp.Reg) != MRI.getRegClass(R)) in findMatch()
2326 BitTracker::RegisterRef Inp, Out; member
2495 .addReg(G.Inp.Reg) in moveGroup()
2497 RegMap.insert(std::make_pair(G.Inp.Reg, PhiR)); in moveGroup()
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| D | HexagonISelDAGToDAG.cpp | 1255 SDValue Inp = Op, Res; in SelectInlineAsmMemoryOperand() local
1264 if (SelectAddrFI(Inp, Res)) in SelectInlineAsmMemoryOperand()
1267 OutOps.push_back(Inp); in SelectInlineAsmMemoryOperand()
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| D | HexagonInstrInfo.td | 4117 dag Out, dag Inp>
4118 : SInst<Out, Inp, "$Rd = "#MnOp#"($Rs)", [], "", S_2op_tc_1_SLOT23> {
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| /external/llvm/lib/CodeGen/ |
| D | DFAPacketizer.cpp | 41 DFAInput addDFAFuncUnits(DFAInput Inp, unsigned FuncUnits) { in addDFAFuncUnits() argument
42 return (Inp << DFA_MAX_RESOURCES) | FuncUnits; in addDFAFuncUnits()
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| /external/llvm/utils/TableGen/ |
| D | DFAPacketizerEmitter.cpp | 61 DFAInput addDFAFuncUnits(DFAInput Inp, unsigned FuncUnits) { in addDFAFuncUnits() argument
62 return (Inp << DFA_MAX_RESOURCES) | FuncUnits; in addDFAFuncUnits()
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