Searched refs:IsFP (Results 1 – 12 of 12) sorted by relevance
| /external/llvm/lib/Target/Mips/ |
| D | MipsSEISelLowering.h | 101 bool IsFP) const;
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| D | MipsSEISelLowering.cpp | 3214 bool IsFP) const { in emitINSERT_DF_VIDX()
3261 if (IsFP) { in emitINSERT_DF_VIDX()
3287 if (IsFP) { in emitINSERT_DF_VIDX()
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| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 834 NodeType getExtForLoadExtType(bool IsFP, LoadExtType);
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| /external/v8/src/compiler/ |
| D | register-allocator-verifier.cc | 171 if (sequence()->IsFP(vreg)) { in BuildConstraint()
191 if (sequence()->IsFP(vreg)) { in BuildConstraint()
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| D | instruction.h | 1499 bool IsFP(int virtual_register) const { in NON_EXPORTED_BASE()
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| /external/llvm/lib/Bitcode/Reader/ |
| D | BitcodeReader.cpp | 794 bool IsFP = Ty->isFPOrFPVectorTy(); in getDecodedBinaryOpcode() local
796 if (!IsFP && !Ty->isIntOrIntVectorTy()) in getDecodedBinaryOpcode()
803 return IsFP ? Instruction::FAdd : Instruction::Add; in getDecodedBinaryOpcode()
805 return IsFP ? Instruction::FSub : Instruction::Sub; in getDecodedBinaryOpcode()
807 return IsFP ? Instruction::FMul : Instruction::Mul; in getDecodedBinaryOpcode()
809 return IsFP ? -1 : Instruction::UDiv; in getDecodedBinaryOpcode()
811 return IsFP ? Instruction::FDiv : Instruction::SDiv; in getDecodedBinaryOpcode()
813 return IsFP ? -1 : Instruction::URem; in getDecodedBinaryOpcode()
815 return IsFP ? Instruction::FRem : Instruction::SRem; in getDecodedBinaryOpcode()
817 return IsFP ? -1 : Instruction::Shl; in getDecodedBinaryOpcode()
[all …]
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 2232 static unsigned getVectorComparison(ISD::CondCode CC, bool IsFP) { in getVectorComparison() argument
2236 return IsFP ? SystemZISD::VFCMPE : SystemZISD::VICMPE; in getVectorComparison()
2240 return IsFP ? SystemZISD::VFCMPHE : static_cast<SystemZISD::NodeType>(0); in getVectorComparison()
2244 return IsFP ? SystemZISD::VFCMPH : SystemZISD::VICMPH; in getVectorComparison()
2247 return IsFP ? static_cast<SystemZISD::NodeType>(0) : SystemZISD::VICMPHL; in getVectorComparison()
2258 static unsigned getVectorComparisonOrInvert(ISD::CondCode CC, bool IsFP, in getVectorComparisonOrInvert() argument
2260 if (unsigned Opcode = getVectorComparison(CC, IsFP)) { in getVectorComparisonOrInvert()
2265 CC = ISD::getSetCCInverse(CC, !IsFP); in getVectorComparisonOrInvert()
2266 if (unsigned Opcode = getVectorComparison(CC, IsFP)) { in getVectorComparisonOrInvert()
2306 bool IsFP = CmpOp0.getValueType().isFloatingPoint(); in lowerVectorSETCC() local
[all …]
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| /external/llvm/lib/Target/AArch64/Disassembler/ |
| D | AArch64Disassembler.cpp | 1072 bool IsFP = fieldFromInstruction(insn, 26, 1); in DecodeSignedLdStInstruction() local
1075 if (IsLoad && IsIndexed && !IsFP && Rn != 31 && Rt == Rn) in DecodeSignedLdStInstruction()
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| /external/v8/src/compiler/ia32/ |
| D | instruction-selector-ia32.cc | 1123 sequence()->IsFP(GetVirtualRegister(input.node())) in EmitPrepareArguments()
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| /external/v8/src/compiler/x87/ |
| D | instruction-selector-x87.cc | 1203 sequence()->IsFP(GetVirtualRegister(input.node())) in EmitPrepareArguments()
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| /external/v8/src/compiler/x64/ |
| D | instruction-selector-x64.cc | 1531 sequence()->IsFP(GetVirtualRegister(input_node))) { in EmitPrepareArguments()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAG.cpp | 233 ISD::NodeType ISD::getExtForLoadExtType(bool IsFP, ISD::LoadExtType ExtType) { in getExtForLoadExtType() argument
236 return IsFP ? ISD::FP_EXTEND : ISD::ANY_EXTEND; in getExtForLoadExtType()
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