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Searched refs:MCR (Results 1 – 23 of 23) sorted by relevance

/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/
Dinvalid-MCR-arm.txt3 # Opcode=171 Name=MCR Format=ARM_FORMAT_BRFRM(2)
9 # Encoding error: coproc == 10 or 11 for MCR[R]/MR[R]C
Dbasic-arm-instructions.txt628 # MCR/MCR2
Dthumb2.txt903 # MCR/MCR2
/external/arm-neon-tests/
DInitCache.s24 MCR p15, 0, r0, c1, c0, 0 ; write CP15 register 1
36 MCR p15, 0, r0, c1, c0, 1 ; Write Auxiliary Control Register
45 MCR p15, 0, r0, c1, c0, 0 ; write CP15 register 1
/external/syslinux/com32/libupload/
Dserial.c20 MCR = 4, enumerator
79 sif->old.mcr = inb(port + MCR); in serial_init()
161 outb(sif->old.mcr, port + MCR); in serial_cleanup()
/external/syslinux/com32/lib/
Dvdprintf.c26 MCR = 4, enumerator
/external/syslinux/gpxe/src/drivers/net/
Dsmc9000.h94 #define MCR 10 macro
Dsmc9000.c862 memory = ( inw(nic->ioaddr + MCR) >> 9 ) & 0x7; /* multiplier */ in smc9000_probe()
/external/llvm/test/MC/Disassembler/ARM/
Dinvalid-armv7.txt155 # Opcode=171 Name=MCR Format=ARM_FORMAT_BRFRM(2)
161 # Encoding error: coproc == 10 or 11 for MCR[R]/MR[R]C
Dthumb2.txt1020 # MCR/MCR2
Dbasic-arm-instructions.txt709 # MCR/MCR2
/external/swiftshader/third_party/LLVM/test/MC/ARM/
Ddiagnostics.s78 @ Out of range immediate for MCR/MCR2/MCRR/MCRR2
Dbasic-arm-instructions.s790 @ MCR/MCR2
Dbasic-thumb2-instructions.s1065 @ MCR/MCR2
/external/llvm/test/MC/ARM/
Ddiagnostics.s140 @ Out of range immediate for MCR/MCR2/MCRR/MCRR2
Dbasic-thumb2-instructions.s1374 @ MCR/MCR2
Dbasic-arm-instructions.s1241 @ MCR/MCR2
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86GenRegisterInfo.inc3396 …const MCRegisterClass &MCR = X86MCRegisterClasses[X86::GR8RegClassID]; static const ArrayRef<unsi…
3397 makeArrayRef(MCR.begin(), MCR.getNumRegs()),
3428 …const MCRegisterClass &MCR = X86MCRegisterClasses[X86::GR8_NOREXRegClassID]; static const ArrayRe…
3429 makeArrayRef(MCR.begin(), MCR.getNumRegs()),
/external/llvm/lib/Target/ARM/
DARMInstrInfo.td5049 def MCR : MovRCopro<"mcr", 0 /* from ARM core register to coprocessor */,
5055 ComplexDeprecationPredicate<"MCR">;
5057 (MCR p_imm:$cop, imm0_7:$opc1, GPR:$Rt, c_imm:$CRn,
5530 // Pre-v7 uses MCR for synchronization barriers.
5531 def : ARMPat<(ARMMemBarrierMCR GPR:$zero), (MCR 15, 0, GPR:$zero, 7, 10, 5)>,
DARMISelDAGToDAG.cpp4093 Opcode = IsThumb2 ? ARM::t2MCR : ARM::MCR; in tryWriteRegister()
DARMISelLowering.cpp12335 Function *MCR = llvm::Intrinsic::getDeclaration(M, Intrinsic::arm_mcr); in makeDMB() local
12339 return Builder.CreateCall(MCR, args); in makeDMB()
DARMInstrThumb2.td4199 ComplexDeprecationPredicate<"MCR">;
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMInstrInfo.td4448 def MCR : MovRCopro<"mcr", 0 /* from ARM core register to coprocessor */,
4820 // Pre-v7 uses MCR for synchronization barriers.
4821 def : ARMPat<(ARMMemBarrierMCR GPR:$zero), (MCR 15, 0, GPR:$zero, 7, 10, 5)>,