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Searched refs:MRM2m (Results 1 – 25 of 27) sorted by relevance

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/external/swiftshader/third_party/LLVM/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h219 MRM0m = 24, MRM1m = 25, MRM2m = 26, MRM3m = 27, // Format /0 /1 /2 /3 enumerator
496 case X86II::MRM2m: case X86II::MRM3m: in getMemoryOperandNo()
DX86MCCodeEmitter.cpp544 case X86II::MRM2m: case X86II::MRM3m: in EmitVEXOpcodePrefix()
679 case X86II::MRM2m: case X86II::MRM3m: in DetermineREXPrefix()
976 case X86II::MRM2m: case X86II::MRM3m: in EncodeInstruction()
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86InstrShiftRotate.td360 def RCL8m1 : I<0xD0, MRM2m, (outs), (ins i8mem:$dst),
362 def RCL8mi : Ii8<0xC0, MRM2m, (outs), (ins i8mem:$dst, i8imm:$cnt),
364 def RCL16m1 : I<0xD1, MRM2m, (outs), (ins i16mem:$dst),
366 def RCL16mi : Ii8<0xC1, MRM2m, (outs), (ins i16mem:$dst, i8imm:$cnt),
368 def RCL32m1 : I<0xD1, MRM2m, (outs), (ins i32mem:$dst),
370 def RCL32mi : Ii8<0xC1, MRM2m, (outs), (ins i32mem:$dst, i8imm:$cnt),
372 def RCL64m1 : RI<0xD1, MRM2m, (outs), (ins i64mem:$dst),
374 def RCL64mi : RIi8<0xC1, MRM2m, (outs), (ins i64mem:$dst, i8imm:$cnt),
395 def RCL8mCL : I<0xD2, MRM2m, (outs), (ins i8mem:$dst),
397 def RCL16mCL : I<0xD3, MRM2m, (outs), (ins i16mem:$dst),
[all …]
DX86InstrFPStack.td275 def FCOM32m : FPI<0xD8, MRM2m, (outs), (ins f32mem:$src), "fcom{s}\t$src">;
281 def FICOM32m : FPI<0xDA, MRM2m, (outs), (ins i32mem:$src), "ficom{l}\t$src">;
284 def FCOM64m : FPI<0xDC, MRM2m, (outs), (ins f64mem:$src), "fcom{l}\t$src">;
291 def FICOM16m : FPI<0xDE, MRM2m, (outs), (ins i16mem:$src), "ficom{s}\t$src">;
427 def ST_F32m : FPI<0xD9, MRM2m, (outs), (ins f32mem:$dst), "fst{s}\t$dst">;
428 def ST_F64m : FPI<0xDD, MRM2m, (outs), (ins f64mem:$dst), "fst{l}\t$dst">;
432 def IST_F16m : FPI<0xDF, MRM2m, (outs), (ins i16mem:$dst), "fist{s}\t$dst">;
433 def IST_F32m : FPI<0xDB, MRM2m, (outs), (ins i32mem:$dst), "fist{l}\t$dst">;
DX86InstrControl.td152 def CALL32m : I<0xFF, MRM2m, (outs), (ins i32mem:$dst, variable_ops),
232 def CALL64m : I<0xFF, MRM2m, (outs), (ins i64mem:$dst, variable_ops),
259 def WINCALL64m : I<0xFF, MRM2m, (outs),
DX86InstrSystem.td360 def LGDT16m : I<0x01, MRM2m, (outs), (ins opaque48mem:$src),
362 def LGDTm : I<0x01, MRM2m, (outs), (ins opaque48mem:$src),
370 def LLDT16m : I<0x00, MRM2m, (outs), (ins i16mem:$src),
DX86CodeEmitter.cpp207 case X86II::MRM2m: case X86II::MRM3m: in determineREX()
937 case X86II::MRM2m: case X86II::MRM3m: in emitInstruction()
DX86InstrArithmetic.td366 def NOT8m : I<0xF6, MRM2m, (outs), (ins i8mem :$dst),
369 def NOT16m : I<0xF7, MRM2m, (outs), (ins i16mem:$dst),
372 def NOT32m : I<0xF7, MRM2m, (outs), (ins i32mem:$dst),
375 def NOT64m : RI<0xF7, MRM2m, (outs), (ins i64mem:$dst), "not{q}\t$dst",
1100 defm ADC : ArithBinOp_RFF<0x10, 0x12, 0x14, "adc", MRM2r, MRM2m, X86adc_flag,
DX86InstrFormats.td28 def MRM0m : Format<24>; def MRM1m : Format<25>; def MRM2m : Format<26>;
/external/llvm/lib/Target/X86/
DX86InstrShiftRotate.td412 def RCL8m1 : I<0xD0, MRM2m, (outs), (ins i8mem:$dst),
414 def RCL8mi : Ii8<0xC0, MRM2m, (outs), (ins i8mem:$dst, u8imm:$cnt),
416 def RCL16m1 : I<0xD1, MRM2m, (outs), (ins i16mem:$dst),
418 def RCL16mi : Ii8<0xC1, MRM2m, (outs), (ins i16mem:$dst, u8imm:$cnt),
420 def RCL32m1 : I<0xD1, MRM2m, (outs), (ins i32mem:$dst),
422 def RCL32mi : Ii8<0xC1, MRM2m, (outs), (ins i32mem:$dst, u8imm:$cnt),
424 def RCL64m1 : RI<0xD1, MRM2m, (outs), (ins i64mem:$dst),
426 def RCL64mi : RIi8<0xC1, MRM2m, (outs), (ins i64mem:$dst, u8imm:$cnt),
447 def RCL8mCL : I<0xD2, MRM2m, (outs), (ins i8mem:$dst),
449 def RCL16mCL : I<0xD3, MRM2m, (outs), (ins i16mem:$dst),
[all …]
DX86InstrFPStack.td325 def FCOM32m : FPI<0xD8, MRM2m, (outs), (ins f32mem:$src), "fcom{s}\t$src">;
331 def FICOM32m : FPI<0xDA, MRM2m, (outs), (ins i32mem:$src), "ficom{l}\t$src">;
334 def FCOM64m : FPI<0xDC, MRM2m, (outs), (ins f64mem:$src), "fcom{l}\t$src">;
341 def FICOM16m : FPI<0xDE, MRM2m, (outs), (ins i16mem:$src), "ficom{s}\t$src">;
484 def ST_F32m : FPI<0xD9, MRM2m, (outs), (ins f32mem:$dst), "fst{s}\t$dst",
486 def ST_F64m : FPI<0xDD, MRM2m, (outs), (ins f64mem:$dst), "fst{l}\t$dst",
494 def IST_F16m : FPI<0xDF, MRM2m, (outs), (ins i16mem:$dst), "fist{s}\t$dst",
496 def IST_F32m : FPI<0xDB, MRM2m, (outs), (ins i32mem:$dst), "fist{l}\t$dst",
DX86InstrControl.td207 def CALL16m : I<0xFF, MRM2m, (outs), (ins i16mem:$dst),
215 def CALL32m : I<0xFF, MRM2m, (outs), (ins i32mem:$dst),
287 def CALL64m : I<0xFF, MRM2m, (outs), (ins i64mem:$dst),
DX86InstrSystem.td418 def LGDT16m : I<0x01, MRM2m, (outs), (ins opaque48mem:$src),
420 def LGDT32m : I<0x01, MRM2m, (outs), (ins opaque48mem:$src),
422 def LGDT64m : I<0x01, MRM2m, (outs), (ins opaque80mem:$src),
432 def LLDT16m : I<0x00, MRM2m, (outs), (ins i16mem:$src),
DX86InstrArithmetic.td435 def NOT8m : I<0xF6, MRM2m, (outs), (ins i8mem :$dst),
438 def NOT16m : I<0xF7, MRM2m, (outs), (ins i16mem:$dst),
442 def NOT32m : I<0xF7, MRM2m, (outs), (ins i32mem:$dst),
446 def NOT64m : RI<0xF7, MRM2m, (outs), (ins i64mem:$dst), "not{q}\t$dst",
1205 defm ADC : ArithBinOp_RFF<0x10, 0x12, 0x14, "adc", MRM2r, MRM2m, X86adc_flag,
DX86InstrInfo.td2222 defm BLSMSK32 : bmi_bls<"blsmsk{l}", MRM2r, MRM2m, GR32, i32mem>;
2223 defm BLSMSK64 : bmi_bls<"blsmsk{q}", MRM2r, MRM2m, GR64, i64mem>, VEX_W;
2401 defm BLSFILL : tbm_binary_intr<0x01, "blsfill", MRM2r, MRM2m>;
DX86InstrFormats.td33 def MRM0m : Format<24>; def MRM1m : Format<25>; def MRM2m : Format<26>;
DX86InstrAVX512.td4249 defm VPSRL : avx512_shift_rmi_dq<0x72, 0x73, MRM2r, MRM2m, "vpsrl", X86vsrli>,
4250 avx512_shift_rmi_w<0x71, MRM2r, MRM2m, "vpsrlw", X86vsrli>, AVX512BIi8Base, EVEX_4V;
6806 defm VGATHERPF1DPS: avx512_gather_scatter_prefetch<0xC6, MRM2m, "vgatherpf1dps",
6809 defm VGATHERPF1QPS: avx512_gather_scatter_prefetch<0xC7, MRM2m, "vgatherpf1qps",
6812 defm VGATHERPF1DPD: avx512_gather_scatter_prefetch<0xC6, MRM2m, "vgatherpf1dpd",
6815 defm VGATHERPF1QPD: avx512_gather_scatter_prefetch<0xC7, MRM2m, "vgatherpf1qpd",
/external/swiftshader/third_party/LLVM/utils/TableGen/
DX86RecognizableInstr.cpp53 MRM0m = 24, MRM1m = 25, MRM2m = 26, MRM3m = 27, enumerator
750 case X86Local::MRM2m: in emitInstructionSpecifier()
831 case X86Local::MRM2m: in emitDecodePath()
920 case X86Local::MRM2m: in emitDecodePath()
/external/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h299 MRM0m = 24, MRM1m = 25, MRM2m = 26, MRM3m = 27, // Format /0 /1 /2 /3 enumerator
692 case X86II::MRM2m: case X86II::MRM3m: in getMemoryOperandNo()
DX86MCCodeEmitter.cpp783 case X86II::MRM2m: case X86II::MRM3m: in EmitVEXOpcodePrefix()
1013 case X86II::MRM2m: case X86II::MRM3m: in DetermineREXPrefix()
1372 case X86II::MRM2m: case X86II::MRM3m: in encodeInstruction()
/external/llvm/utils/TableGen/
DX86RecognizableInstr.cpp110 MRM0m = 24, MRM1m = 25, MRM2m = 26, MRM3m = 27, enumerator
742 case X86Local::MRM2m: in emitInstructionSpecifier()
859 case X86Local::MRM2m: case X86Local::MRM3m: in emitDecodePath()
/external/llvm/test/TableGen/
DTargetInstrInfo.td55 def MRM0m : Format<24>; def MRM1m : Format<25>; def MRM2m : Format<26>;
/external/swiftshader/third_party/LLVM/test/TableGen/
DTargetInstrInfo.td55 def MRM0m : Format<24>; def MRM1m : Format<25>; def MRM2m : Format<26>;
/external/llvm/docs/TableGen/
DLangIntro.rst549 def CALL32m : I<0xFF, MRM2m, (outs), (ins i32mem:$dst, variable_ops),
/external/llvm/docs/
DWritingAnLLVMBackend.rst1825 case X86II::MRM2m: case X86II::MRM3m: // a MEMORY r/m operand and

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