| /external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
| D | SparcISelDAGToDAG.cpp | 169 case ISD::MULHU: in Select()
174 unsigned Opcode = N->getOpcode() == ISD::MULHU ? SP::UMULrr : SP::SMULrr; in Select()
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| /external/llvm/lib/Target/Mips/ |
| D | Mips16ISelDAGToDAG.cpp | 246 case ISD::MULHU: { in trySelect()
247 MultOpc = (Opcode == ISD::MULHU ? Mips::MultuRxRy16 : Mips::MultRxRy16); in trySelect()
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| D | MipsSEISelLowering.cpp | 117 setOperationAction(ISD::MULHU, MVT::i32, Custom); in MipsSETargetLowering()
128 setOperationAction(ISD::MULHU, MVT::i64, Custom); in MipsSETargetLowering()
162 setOperationAction(ISD::MULHU, MVT::i32, Legal); in MipsSETargetLowering()
209 setOperationAction(ISD::MULHU, MVT::i64, Legal); in MipsSETargetLowering()
368 case ISD::MULHU: return lowerMulDiv(Op, MipsISD::Multu, false, true, DAG); in LowerOperation()
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| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| D | MipsISelDAGToDAG.cpp | 274 case ISD::MULHU: { in Select()
281 unsigned MulOp = (Opcode == ISD::MULHU ? in Select()
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelDAGToDAG.cpp | 366 case ISD::MULHU: in Select()
371 unsigned Opcode = N->getOpcode() == ISD::MULHU ? SP::UMULrr : SP::SMULrr; in Select()
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| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 304 MULHU, MULHS, enumerator
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| D | SelectionDAG.h | 895 case ISD::MULHU:
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| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 321 MULHU, MULHS, enumerator
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| D | SelectionDAG.h | 1173 case ISD::MULHU:
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| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
| D | MBlazeISelLowering.cpp | 115 setOperationAction(ISD::MULHU, MVT::i32, Expand); in MBlazeTargetLowering()
116 setOperationAction(ISD::MULHU, MVT::i64, Expand); in MBlazeTargetLowering()
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| /external/llvm/lib/Target/X86/ |
| D | X86IntrinsicsInfo.h | 294 X86_INTRINSIC_DATA(avx2_pmulhu_w, INTR_TYPE_2OP, ISD::MULHU, 0),
1188 X86_INTRINSIC_DATA(avx512_mask_pmulhu_w_128, INTR_TYPE_2OP_MASK, ISD::MULHU, 0),
1189 X86_INTRINSIC_DATA(avx512_mask_pmulhu_w_256, INTR_TYPE_2OP_MASK, ISD::MULHU, 0),
1190 X86_INTRINSIC_DATA(avx512_mask_pmulhu_w_512, INTR_TYPE_2OP_MASK, ISD::MULHU, 0),
1900 X86_INTRINSIC_DATA(sse2_pmulhu_w, INTR_TYPE_2OP, ISD::MULHU, 0),
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 2931 if (IsAfterLegalization ? isOperationLegal(ISD::MULHU, VT) : in BuildUDIV()
2932 isOperationLegalOrCustom(ISD::MULHU, VT)) in BuildUDIV()
2933 Q = DAG.getNode(ISD::MULHU, dl, VT, Q, DAG.getConstant(magics.m, dl, VT)); in BuildUDIV()
2987 bool HasMULHU = isOperationLegalOrCustom(ISD::MULHU, HiLoVT); in expandMUL()
3023 Hi = DAG.getNode(ISD::MULHU, dl, HiLoVT, LL, RL); in expandMUL()
3073 Hi = DAG.getNode(ISD::MULHU, dl, HiLoVT, LL, RL); in expandMUL()
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| D | SelectionDAGDumper.cpp | 178 case ISD::MULHU: return "mulhu"; in getOperationName()
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| D | LegalizeDAG.cpp | 3264 case ISD::MULHU: in ExpandNode()
3266 unsigned ExpandOpcode = Node->getOpcode() == ISD::MULHU ? ISD::UMUL_LOHI : in ExpandNode()
3288 bool HasMULHU = TLI.isOperationLegalOrCustom(ISD::MULHU, VT); in ExpandNode()
3384 { { ISD::MULHU, ISD::UMUL_LOHI, ISD::ZERO_EXTEND }, in ExpandNode()
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| /external/swiftshader/third_party/LLVM/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 144 setOperationAction(ISD::MULHU, MVT::i8, Expand); in MSP430TargetLowering()
149 setOperationAction(ISD::MULHU, MVT::i16, Expand); in MSP430TargetLowering()
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| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/Disassembler/ |
| D | MBlazeDisassembler.cpp | 111 case 3: return MBlaze::MULHU; in decodeMUL()
|
| /external/swiftshader/third_party/LLVM/lib/Target/Blackfin/ |
| D | BlackfinISelLowering.cpp | 94 setOperationAction(ISD::MULHU, MVT::i32, Expand); in BlackfinTargetLowering()
|
| /external/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 137 setOperationAction(ISD::MULHU, MVT::i8, Expand); in MSP430TargetLowering()
142 setOperationAction(ISD::MULHU, MVT::i16, Expand); in MSP430TargetLowering()
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| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 98 ISD::MULHS, ISD::MULHU, ISD::SDIVREM, ISD::UDIVREM, ISD::SHL_PARTS, in WebAssemblyTargetLowering()
|
| /external/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.cpp | 85 setOperationAction(ISD::MULHU, MVT::i64, Expand); in BPFTargetLowering()
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| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| D | SPUISelLowering.cpp | 262 setOperationAction(ISD::MULHU, MVT::i8, Expand); in SPUTargetLowering()
266 setOperationAction(ISD::MULHU, MVT::i16, Expand); in SPUTargetLowering()
270 setOperationAction(ISD::MULHU, MVT::i32, Expand); in SPUTargetLowering()
274 setOperationAction(ISD::MULHU, MVT::i64, Expand); in SPUTargetLowering()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 324 setOperationAction(ISD::MULHU, MVT::i64, Expand); in AMDGPUTargetLowering()
1439 SDValue RCP_HI = DAG.getNode(ISD::MULHU, DL, VT, RCP, Den); in LowerUDIVREM()
1451 SDValue E = DAG.getNode(ISD::MULHU, DL, VT, ABS_RCP_LO, RCP); in LowerUDIVREM()
1464 SDValue Quotient = DAG.getNode(ISD::MULHU, DL, VT, Tmp0, Num); in LowerUDIVREM()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | LegalizeDAG.cpp | 3499 case ISD::MULHU: in ExpandNode()
3501 unsigned ExpandOpcode = Node->getOpcode() == ISD::MULHU ? ISD::UMUL_LOHI : in ExpandNode()
3528 bool HasMULHU = TLI.isOperationLegalOrCustom(ISD::MULHU, VT); in ExpandNode()
3607 { { ISD::MULHU, ISD::UMUL_LOHI, ISD::ZERO_EXTEND }, in ExpandNode()
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| D | LegalizeIntegerTypes.cpp | 1895 bool HasMULHU = TLI.isOperationLegalOrCustom(ISD::MULHU, NVT); in ExpandIntRes_MUL()
1920 Hi = DAG.getNode(ISD::MULHU, dl, NVT, LL, RL); in ExpandIntRes_MUL()
1953 Hi = DAG.getNode(ISD::MULHU, dl, NVT, LL, RL); in ExpandIntRes_MUL()
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| /external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
| D | AlphaISelLowering.cpp | 585 return DAG.getNode(ISD::MULHU, dl, MVT::i64, in LowerOperation()
|