Searched refs:OFFB_FC3210 (Results 1 – 2 of 2) sorted by relevance
254 #define OFFB_FC3210 offsetof(VexGuestX86State,guest_FC3210) macro3486 return IRExpr_Get( OFFB_FC3210, Ity_I32 ); in get_C3210()3491 stmt( IRStmt_Put( OFFB_FC3210, e ) ); in put_C3210()4060 d->fxState[3].offset = OFFB_FC3210; in dis_FPU()4155 d->fxState[3].offset = OFFB_FC3210; in dis_FPU()4871 d->fxState[4].offset = OFFB_FC3210; in dis_FPU()5075 d->fxState[4].offset = OFFB_FC3210; in dis_FPU()5133 d->fxState[4].offset = OFFB_FC3210; in dis_FPU()8420 d->fxState[4].offset = OFFB_FC3210; in disInstr_X86_WRK()8494 d->fxState[4].offset = OFFB_FC3210; in disInstr_X86_WRK()
419 #define OFFB_FC3210 offsetof(VexGuestAMD64State,guest_FC3210) macro5073 return IRExpr_Get( OFFB_FC3210, Ity_I64 ); in get_C3210()5079 stmt( IRStmt_Put( OFFB_FC3210, e ) ); in put_C3210()5351 d->fxState[4].offset = OFFB_FC3210; in gen_FINIT_SEQUENCE()5722 d->fxState[3].offset = OFFB_FC3210; in dis_FPU()5818 d->fxState[3].offset = OFFB_FC3210; in dis_FPU()6696 d->fxState[4].offset = OFFB_FC3210; in dis_FPU()6776 d->fxState[4].offset = OFFB_FC3210; in dis_FPU()11758 d0->fxState[4].offset = OFFB_FC3210; in gen_XSAVE_SEQUENCE()11980 d0->fxState[4].offset = OFFB_FC3210; in gen_XRSTOR_SEQUENCE()