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Searched refs:OP_INSBF (Results 1 – 11 of 11) sorted by relevance

/external/mesa3d/src/gallium/drivers/nouveau/codegen/
Dnv50_ir_target_gm107.cpp90 if (insn->op == OP_INSBF || insn->op == OP_EXTBF) in isReuseSupported()
209 case OP_INSBF: in getLatency()
Dnv50_ir_target_nv50.cpp437 case OP_INSBF: in isOpSupported()
Dnv50_ir_lowering_nvc0.cpp762 bld.mkOp3(OP_INSBF, TYPE_U32, hnd, rHnd, bld.mkImm(0x1400), sHnd); in handleTEX()
847 bld.mkOp3(OP_INSBF, TYPE_U32, src, ticRel, bld.mkImm(0x0917), src); in handleTEX()
849 bld.mkOp3(OP_INSBF, TYPE_U32, src, tscRel, bld.mkImm(0x0710), src); in handleTEX()
883 bld.mkOp3(OP_INSBF, TYPE_U32, in handleTEX()
910 bld.mkOp3(OP_INSBF, TYPE_U32, i->getSrc(s), in handleTEX()
2319 ptr = bld.mkOp3v(OP_INSBF, TYPE_U32, bld.getSSA(), in handleLDST()
Dnv50_ir_target_nvc0.cpp136 { OP_INSBF, 0x0, 0x0, 0x0, 0x0, 0x6, 0x2 },
Dnv50_ir_from_tgsi.cpp2915 offset = mkOp3v(OP_INSBF, TYPE_U32, getScratch(), in handleINTERP()
3383 mkOp3(OP_INSBF, TYPE_U32, dst0[c], val1, mkImm(0x1010), val0); in handleInstruction()
3662 mkOp3(OP_INSBF, TYPE_U32, val0, src2, mkImm(0x808), src1); in handleInstruction()
3674 mkOp3(OP_INSBF, TYPE_U32, val0, src3, mkImm(0x808), src2); in handleInstruction()
3675 mkOp3(OP_INSBF, TYPE_U32, dst0[c], src1, val0, src0); in handleInstruction()
Dnv50_ir.h148 OP_INSBF, // insert first src1[8:15] bits of src0 into src2 at src1[0:7] enumerator
Dnv50_ir_emit_nv50.cpp2054 case OP_INSBF: in emitInstruction()
Dnv50_ir_emit_gk110.cpp2572 case OP_INSBF: in emitInstruction()
Dnv50_ir_emit_nvc0.cpp2791 case OP_INSBF: in emitInstruction()
Dnv50_ir_emit_gm107.cpp3179 case OP_INSBF: in emitInstruction()
Dnv50_ir_peephole.cpp746 case OP_INSBF: { in expr()