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Searched refs:P5600 (Results 1 – 3 of 3) sorted by relevance

/external/llvm/lib/Target/Mips/
DMips.td187 "MipsSubtarget::CPU::P5600",
188 "The P5600 Processor", [FeatureMips32r5]>;
DMipsSubtarget.h45 enum class CPU { P5600 }; enumerator
DMipsScheduleP5600.td1 //==- MipsScheduleP5600.td - P5600 Scheduling Definitions --*- tablegen -*-===//
369 // The following instruction classes are never valid on P5600.
376 // The following instructions are never valid on P5600.