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Searched refs:RECIP_IEEE (Results 1 – 9 of 9) sorted by relevance

/external/llvm/test/CodeGen/AMDGPU/
Dfdiv.ll9 ; scheduler is scheduling the RECIP_IEEE and MUL_IEEE instructions in separate
15 ; R600-DAG: RECIP_IEEE * T{{[0-9]+\.[XYZW]}}, KC0[2].W
38 ; R600-DAG: RECIP_IEEE * T{{[0-9]+\.[XYZW]}}, KC0[2].W
54 ; R600-DAG: RECIP_IEEE * T{{[0-9]+\.[XYZW]}}, KC0[2].W
70 ; R600-DAG: RECIP_IEEE * T{{[0-9]+\.[XYZW]}}, KC0[3].Z
71 ; R600-DAG: RECIP_IEEE * T{{[0-9]+\.[XYZW]}}, KC0[3].Y
99 ; R600-DAG: RECIP_IEEE * T{{[0-9]+\.[XYZW]}}, KC0[3].Z
100 ; R600-DAG: RECIP_IEEE * T{{[0-9]+\.[XYZW]}}, KC0[3].Y
121 ; R600-DAG: RECIP_IEEE * T{{[0-9]+\.[XYZW]}}, KC0[3].Z
122 ; R600-DAG: RECIP_IEEE * T{{[0-9]+\.[XYZW]}}, KC0[3].Y
[all …]
Dudivrem24.ll13 ; EG-DAG: RECIP_IEEE
32 ; EG-DAG: RECIP_IEEE
51 ; EG-DAG: RECIP_IEEE
69 ; EG-NOT: RECIP_IEEE
86 ; EG-NOT: RECIP_IEEE
103 ; EG-NOT: RECIP_IEEE
123 ; EG-NOT: RECIP_IEEE
143 ; EG-NOT: RECIP_IEEE
163 ; EG-NOT: RECIP_IEEE
185 ; EG-DAG: RECIP_IEEE
[all …]
Dsdivrem24.ll13 ; EG-DAG: RECIP_IEEE
32 ; EG-DAG: RECIP_IEEE
51 ; EG-DAG: RECIP_IEEE
71 ; EG-NOT: RECIP_IEEE
90 ; EG-NOT: RECIP_IEEE
109 ; EG-NOT: RECIP_IEEE
131 ; EG-DAG: RECIP_IEEE
150 ; EG-DAG: RECIP_IEEE
169 ; EG-DAG: RECIP_IEEE
189 ; EG-NOT: RECIP_IEEE
[all …]
Dreciprocal.ll3 ;CHECK: RECIP_IEEE * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
Drcp-pattern.ll6 ; EG: RECIP_IEEE
/external/mesa3d/src/gallium/drivers/freedreno/a2xx/
Dinstr-a2xx.h59 RECIP_IEEE = 19, enumerator
Dfd2_compiler.c769 instr = ir2_instr_create_alu(next_exec_cf(ctx), MAXv, RECIP_IEEE); in translate_tex()
1022 instr = ir2_instr_create_alu(cf, ~0, RECIP_IEEE); in translate_instruction()
Ddisasm-a2xx.c180 INSTR(RECIP_IEEE, 1),
/external/llvm/lib/Target/AMDGPU/
DR600Instructions.td1101 inst, "RECIP_IEEE", [(set f32:$dst, (AMDGPUrcp f32:$src0))]