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Searched refs:SLM (Results 1 – 5 of 5) sorted by relevance

/external/llvm/test/CodeGen/X86/
Dmovbe.ll2 ; RUN: llc -mtriple=x86_64-linux -mcpu=slm < %s | FileCheck %s -check-prefix=SLM
14 ; SLM-LABEL: test1:
15 ; SLM: movbew %si, (%rdi)
24 ; SLM-LABEL: test2:
25 ; SLM: movbew (%rdi), %ax
34 ; SLM-LABEL: test3:
35 ; SLM: movbel %esi, (%rdi)
44 ; SLM-LABEL: test4:
45 ; SLM: movbel (%rdi), %eax
54 ; SLM-LABEL: test5:
[all …]
Dfold-push.ll2 …-mtriple=i686-windows -mattr=call-reg-indirect | FileCheck %s -check-prefix=CHECK -check-prefix=SLM
14 ; SLM: movl (%esp), [[RELOAD:%e..]]
15 ; SLM-NEXT: pushl [[RELOAD]]
Dprefetch.ll4 ; RUN: llc < %s -march=x86 -mcpu=slm | FileCheck %s -check-prefix=SLM
18 ; SLM: prefetchw
/external/llvm/lib/Target/Hexagon/
DHexagonExpandCondsets.cpp353 LaneBitmask SLM = getLaneMask(Reg, Op.getSubReg()); in updateKillFlags() local
354 if ((SLM & LM) == SLM) { in updateKillFlags()
417 LaneBitmask SLM = getLaneMask(DR, DSR); in updateDeadsInRange() local
418 return (SLM & LM) != 0; in updateDeadsInRange()
/external/llvm/lib/Target/X86/
DX86ScheduleSLM.td16 // All x86 instructions are modeled as a single micro-op, and SLM can decode 2