Searched refs:SPSR_fiq (Results 1 – 8 of 8) sorted by relevance
| /external/llvm/test/MC/ARM/ |
| D | move-banked-regs.s | 41 @ CHECK-ARM: mrs r3, SPSR_fiq @ encoding: [0x00,0x32,0x4e,0xe1]
49 @ CHECK-THUMB: mrs r3, SPSR_fiq @ encoding: [0xfe,0xf3,0x20,0x83]
151 @ CHECK-ARM: msr SPSR_fiq, r3 @ encoding: [0x03,0xf2,0x6e,0xe1]
159 @ CHECK-THUMB: msr SPSR_fiq, r3 @ encoding: [0x93,0xf3,0x20,0x8e]
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| /external/llvm/test/MC/Disassembler/ARM/ |
| D | move-banked-regs-arm.txt | 34 @ CHECK: mrs r3, SPSR_fiq
108 @ CHECK: msr SPSR_fiq, r3
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| D | move-banked-regs-thumb.txt | 33 @ CHECK: mrs r3, SPSR_fiq
110 @ CHECK: msr SPSR_fiq, r3
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| /external/vixl/src/aarch32/ |
| D | instructions-aarch32.cc | 342 case SPSR_fiq: in GetName()
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| D | instructions-aarch32.h | 813 SPSR_fiq = 0x2e, enumerator
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| /external/llvm/test/MC/AArch64/ |
| D | basic-a64-instructions.s | 3826 msr SPSR_fiq, x12
4374 mrs x9, SPSR_fiq
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64SystemOperands.td | 577 def : RWSysReg<"SPSR_fiq", 0b11, 0b100, 0b0100, 0b0011, 0b011>;
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| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | basic-a64-instructions.txt | 3299 # CHECK: msr {{SPSR_fiq|SPSR_FIQ}}, x12
3591 # CHECK: mrs x9, {{SPSR_fiq|SPSR_FIQ}}
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