Searched refs:SrlRes (Results 1 – 2 of 2) sorted by relevance
/external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
D | MipsISelLowering.cpp | 978 unsigned SrlRes = RegInfo.createVirtualRegister(RC); in EmitAtomicBinaryPartword() local 1087 BuildMI(BB, dl, TII->get(Mips::SRLV), SrlRes) in EmitAtomicBinaryPartword() 1090 .addReg(SrlRes).addImm(ShiftImm); in EmitAtomicBinaryPartword() 1199 unsigned SrlRes = RegInfo.createVirtualRegister(RC); in EmitAtomicCmpSwapPartword() local 1296 BuildMI(BB, dl, TII->get(Mips::SRLV), SrlRes) in EmitAtomicCmpSwapPartword() 1299 .addReg(SrlRes).addImm(ShiftImm); in EmitAtomicCmpSwapPartword()
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/external/llvm/lib/Target/Mips/ |
D | MipsISelLowering.cpp | 1260 unsigned SrlRes = RegInfo.createVirtualRegister(RC); in emitAtomicBinaryPartword() local 1382 BuildMI(BB, DL, TII->get(Mips::SRLV), SrlRes) in emitAtomicBinaryPartword() 1384 BB = emitSignExtendToI32InReg(MI, BB, Size, Dest, SrlRes); in emitAtomicBinaryPartword() 1515 unsigned SrlRes = RegInfo.createVirtualRegister(RC); in emitAtomicCmpSwapPartword() local 1627 BuildMI(BB, DL, TII->get(Mips::SRLV), SrlRes) in emitAtomicCmpSwapPartword() 1629 BB = emitSignExtendToI32InReg(MI, BB, Size, Dest, SrlRes); in emitAtomicCmpSwapPartword()
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