| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 122 TargetConstant, enumerator
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| D | SelectionDAGNodes.h | 1149 : SDNode(isTarget ? ISD::TargetConstant : ISD::Constant,
1166 N->getOpcode() == ISD::TargetConstant;
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| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 120 TargetConstant, enumerator
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| D | SelectionDAGNodes.h | 1285 : SDNode(isTarget ? ISD::TargetConstant : ISD::Constant, 0, DL,
1305 N->getOpcode() == ISD::TargetConstant;
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| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-patchpoint.ll | 46 ; Test patchpoints reusing the same TargetConstant.
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| /external/llvm/test/CodeGen/X86/ |
| D | patchpoint.ll | 58 ; Test patchpoints reusing the same TargetConstant.
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| /external/llvm/test/CodeGen/PowerPC/ |
| D | ppc64-patchpoint.ll | 70 ; Test patchpoints reusing the same TargetConstant.
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| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| D | SPUISelDAGToDAG.cpp | 336 case ISD::TargetConstant: in SelectAFormAddr()
430 || Op1.getOpcode() == ISD::TargetConstant) { in DFormAddressPredicate()
451 || Op0.getOpcode() == ISD::TargetConstant) { in DFormAddressPredicate()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 129 case ISD::TargetConstant: in getOperationName()
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| D | LegalizeTypes.h | 92 return N->getOpcode() == ISD::TargetConstant; in IgnoreNodeResults()
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| D | LegalizeDAG.cpp | 925 if (Node->getOpcode() == ISD::TargetConstant) // Allow illegal target nodes. in LegalizeOp()
939 Op.getOpcode() == ISD::TargetConstant) && in LegalizeOp()
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| D | SelectionDAGISel.cpp | 2742 case ISD::TargetConstant: in SelectCodeCommon()
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| D | SelectionDAG.cpp | 386 case ISD::TargetConstant: in AddNodeIDCustom()
1179 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; in getConstant()
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| D | DAGCombiner.cpp | 10012 assert((Inc.getOpcode() != ISD::TargetConstant || in SplitIndexingFromLoad()
10015 if (Inc.getOpcode() == ISD::TargetConstant) { in SplitIndexingFromLoad()
10065 bool HasOTCInc = LD->getOperand(2).getOpcode() == ISD::TargetConstant && in visitLOAD()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | LegalizeTypes.h | 78 return N->getOpcode() == ISD::TargetConstant; in IgnoreNodeResults()
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| D | SelectionDAG.cpp | 362 case ISD::TargetConstant: in AddNodeIDCustom()
954 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; in getConstant()
5936 case ISD::TargetConstant: return "TargetConstant"; in getOperationName()
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| D | SelectionDAGISel.cpp | 2032 case ISD::TargetConstant: in SelectCodeCommon()
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| D | LegalizeDAG.cpp | 767 if (Op.getOpcode() == ISD::TargetConstant) // Allow illegal target nodes. in LegalizeOp()
782 Node->getOperand(i).getOpcode() == ISD::TargetConstant) && in LegalizeOp()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 144 if (N.getOpcode() == ISD::TargetConstant || in SelectAddrImmOffs()
2433 N->getOperand(1).getOpcode() == ISD::TargetConstant) in Select()
2512 if (Offset.getOpcode() == ISD::TargetConstant || in Select()
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| /external/swiftshader/third_party/LLVM/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 280 def timm : SDNode<"ISD::TargetConstant",SDTIntLeaf, [], "ConstantSDNode">;
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 329 def timm : SDNode<"ISD::TargetConstant",SDTIntLeaf, [], "ConstantSDNode">;
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| /external/llvm/lib/Target/Mips/ |
| D | MipsSEISelLowering.cpp | 1332 assert(Op->getOperand(OpNo).getOpcode() == ISD::TargetConstant); in lowerDSPIntr()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 9368 case ISD::TargetConstant: { in checkValueWidth()
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86GenDAGISel.inc | 35344 /*73440*/ OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
35348 /*73447*/ OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
35545 /*73783*/ OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
36077 /*74840*/ OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
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