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Searched refs:bankHeight (Results 1 – 6 of 6) sorted by relevance

/external/mesa3d/src/amd/addrlib/r800/
Degbaddrlib.cpp539 bankBits = (paddedHeight / 8 / pOut->pTileInfo->bankHeight) & checkMask; in ComputeSurfaceInfoMacroTiled()
710 if (tileSize * pTileInfo->bankWidth * pTileInfo->bankHeight > m_rowSize) in HwlReduceBankWidthHeight()
728 tileSize * pTileInfo->bankWidth * pTileInfo->bankHeight > m_rowSize; in HwlReduceBankWidthHeight()
738 ADDR_ASSERT((pTileInfo->bankHeight % bankHeightAlign) == 0); in HwlReduceBankWidthHeight()
758 if (stillGreater && pTileInfo->bankHeight > bankHeightAlign) in HwlReduceBankWidthHeight()
760 while (stillGreater && pTileInfo->bankHeight > bankHeightAlign) in HwlReduceBankWidthHeight()
762 pTileInfo->bankHeight >>= 1; in HwlReduceBankWidthHeight()
764 if (pTileInfo->bankHeight < bankHeightAlign) in HwlReduceBankWidthHeight()
766 pTileInfo->bankHeight = bankHeightAlign; in HwlReduceBankWidthHeight()
771 tileSize * pTileInfo->bankWidth * pTileInfo->bankHeight > m_rowSize; in HwlReduceBankWidthHeight()
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Dciaddrlib.cpp1290 pCfg->info.bankHeight = 1; in ReadGbTileMode()
1383 pCfg->bankHeight = 1 << gbTileMode.f.bank_height; in ReadGbMacroTileCfg()
Dsiaddrlib.cpp2033 *pY += yBit * pTileInfo->bankHeight * MicroTileHeight; in HwlComputeSurfaceCoord2DFromBankPipe()
2473 pInfo->bankHeight = 1; in HwlSetupTileCfg()
2533 pCfg->info.bankHeight = 1 << gbTileMode.f.bank_height; in ReadGbTileMode()
/external/mesa3d/src/amd/vulkan/winsys/amdgpu/
Dradv_amdgpu_surface.c412 AddrTileInfoIn.bankHeight = surf->bankh; in radv_amdgpu_winsys_surface_init()
474 surf->bankh = AddrSurfInfoOut.pTileInfo->bankHeight; in radv_amdgpu_winsys_surface_init()
/external/mesa3d/src/gallium/winsys/amdgpu/drm/
Damdgpu_surface.c446 AddrTileInfoIn.bankHeight = surf->bankh; in amdgpu_surface_init()
515 surf->bankh = AddrSurfInfoOut.pTileInfo->bankHeight; in amdgpu_surface_init()
/external/mesa3d/src/amd/addrlib/
Daddrinterface.h398 UINT_32 bankHeight; ///< Number of tiles in the Y direction in the same bank member