| /external/llvm/lib/Target/AMDGPU/ |
| D | SILowerI1Copies.cpp | 106 TRI->getCommonSubClass(SrcRC, &AMDGPU::SGPR_64RegClass)) { in runOnMachineFunction()
132 } else if (TRI->getCommonSubClass(DstRC, &AMDGPU::SGPR_64RegClass) && in runOnMachineFunction()
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| D | SIRegisterInfo.cpp | 713 return getCommonSubClass(&AMDGPU::VGPR_32RegClass, RC) != nullptr; in hasVGPRs()
715 return getCommonSubClass(&AMDGPU::VReg_64RegClass, RC) != nullptr; in hasVGPRs()
717 return getCommonSubClass(&AMDGPU::VReg_96RegClass, RC) != nullptr; in hasVGPRs()
719 return getCommonSubClass(&AMDGPU::VReg_128RegClass, RC) != nullptr; in hasVGPRs()
721 return getCommonSubClass(&AMDGPU::VReg_256RegClass, RC) != nullptr; in hasVGPRs()
723 return getCommonSubClass(&AMDGPU::VReg_512RegClass, RC) != nullptr; in hasVGPRs()
828 return getCommonSubClass(DefRC, SrcRC) != nullptr; in shouldRewriteCopySrc()
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| D | SIInstrInfo.cpp | 1890 if (RI.getCommonSubClass(&AMDGPU::VReg_64RegClass, VRC)) in legalizeOpWithMove()
1988 return RI.getCommonSubClass(RC, RI.getRegClass(OpInfo.RegClass)) == RC; in isLegalRegOperand()
2350 if (RI.getCommonSubClass(MRI.getRegClass(SRsrc->getReg()), in legalizeOperands()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | MachineRegisterInfo.cpp | 57 const TargetRegisterClass *NewRC = TRI->getCommonSubClass(OldRC, RC); in constrainRegClass()
85 NewRC = TRI->getCommonSubClass(NewRC, OpRC); in recomputeRegClass()
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| D | LiveStackAnalysis.cpp | 65 S2RCMap[Slot] = TRI->getCommonSubClass(OldRC, RC); in getOrCreateInterval()
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| D | RegisterCoalescer.cpp | 291 if (!TRI.getCommonSubClass(DstRC, SrcRC)) in setRegisters()
311 NewRC = TRI.getCommonSubClass(DstRC, SrcRC); in setRegisters()
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| /external/llvm/lib/CodeGen/ |
| D | LiveStackAnalysis.cpp | 70 S2RCMap[Slot] = TRI->getCommonSubClass(OldRC, RC); in getOrCreateInterval()
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| D | TargetRegisterInfo.cpp | 195 TargetRegisterInfo::getCommonSubClass(const TargetRegisterClass *A, in getCommonSubClass() function in TargetRegisterInfo
317 return TRI.getCommonSubClass(DefRC, SrcRC) != nullptr; in shareSameRegisterFile()
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| D | MachineRegisterInfo.cpp | 57 getTargetRegisterInfo()->getCommonSubClass(OldRC, RC); in constrainRegClass()
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| D | DetectDeadLanes.cpp | 193 return !TRI.getCommonSubClass(SrcRC, DstRC); in isCrossCopy()
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| D | RegisterCoalescer.cpp | 375 NewRC = TRI.getCommonSubClass(DstRC, SrcRC); in setRegisters()
973 TRI->getCommonSubClass(DefRC, DstRC); in reMaterializeTrivialDef()
1025 NewRC = TRI->getCommonSubClass(NewRC, DefRC); in reMaterializeTrivialDef()
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| D | MachineInstr.cpp | 1257 CurRC = TRI->getCommonSubClass(CurRC, OpRC); in getRegClassConstraintEffect()
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| /external/swiftshader/third_party/LLVM/lib/Target/ |
| D | TargetRegisterInfo.cpp | 101 TargetRegisterInfo::getCommonSubClass(const TargetRegisterClass *A, in getCommonSubClass() function in TargetRegisterInfo
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86RegisterInfo.cpp | 169 case 2: return getCommonSubClass(A, &X86::GR16_ABCDRegClass); in getMatchingSuperRegClass()
170 case 4: return getCommonSubClass(A, &X86::GR32_ABCDRegClass); in getMatchingSuperRegClass()
171 case 8: return getCommonSubClass(A, &X86::GR64_ABCDRegClass); in getMatchingSuperRegClass()
209 return getCommonSubClass(A, &X86::GR64_NOSPRegClass); in getMatchingSuperRegClass()
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| /external/swiftshader/third_party/LLVM/include/llvm/Target/ |
| D | TargetRegisterInfo.h | 465 getCommonSubClass(const TargetRegisterClass *A,
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| /external/llvm/include/llvm/Target/ |
| D | TargetRegisterInfo.h | 664 getCommonSubClass(const TargetRegisterClass *A,
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | InstrEmitter.cpp | 143 TRI->getCommonSubClass(UseRC, RC, VT.SimpleTy); in EmitCopyFromReg()
231 VTRC = TRI->getCommonSubClass(RC, VTRC); in CreateVirtualRegisters()
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| D | DAGCombiner.cpp | 10455 if (!TRI || TRI->getCommonSubClass(ArgRC, ResRC)) in canMergeExpensiveCrossRegisterBankCopy()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 703 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg)); in canInsertSelect()
739 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg)); in insertSelect()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | InstrEmitter.cpp | 123 TRI->getCommonSubClass(UseRC, RC); in EmitCopyFromReg()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.cpp | 373 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg)); in canInsertSelect()
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrInfo.cpp | 4293 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg)); in canInsertSelect()
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