/external/llvm/lib/Target/AMDGPU/ |
D | SIInstrInfo.h | 184 return MI.getDesc().TSFlags & SIInstrFlags::SALU; in isSALU() 192 return MI.getDesc().TSFlags & SIInstrFlags::VALU; in isVALU() 208 return MI.getDesc().TSFlags & SIInstrFlags::SOP1; in isSOP1() 216 return MI.getDesc().TSFlags & SIInstrFlags::SOP2; in isSOP2() 224 return MI.getDesc().TSFlags & SIInstrFlags::SOPC; in isSOPC() 232 return MI.getDesc().TSFlags & SIInstrFlags::SOPK; in isSOPK() 240 return MI.getDesc().TSFlags & SIInstrFlags::SOPP; in isSOPP() 248 return MI.getDesc().TSFlags & SIInstrFlags::VOP1; in isVOP1() 256 return MI.getDesc().TSFlags & SIInstrFlags::VOP2; in isVOP2() 264 return MI.getDesc().TSFlags & SIInstrFlags::VOP3; in isVOP3() [all …]
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/external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
D | HexagonMCInstrInfo.cpp | 134 MCInstrDesc const &Desc = HexagonMCInstrInfo::getDesc(MCII, Inst); in deriveExtender() 170 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags; in getAccessSize() 178 uint64_t const F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags; in getBitCount() 185 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags; in getCExtOpNum() 189 MCInstrDesc const &HexagonMCInstrInfo::getDesc(MCInstrInfo const &MCII, in getDesc() function in llvm::HexagonMCInstrInfo 251 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags; in getExtendableOp() 269 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags; in getExtentAlignment() 275 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags; in getExtentBits() 283 uint64_t const F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags; in getMaxValue() 298 uint64_t const F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags; in getMinValue() [all …]
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D | HexagonShuffler.cpp | 132 setLoad(HexagonMCInstrInfo::getDesc(MCII, *id).mayLoad()); in HexagonCVIResource() 133 setStore(HexagonMCInstrInfo::getDesc(MCII, *id).mayStore()); in HexagonCVIResource() 195 MCInst const *ID = ISJ->getDesc(); in check() 233 if (HexagonMCInstrInfo::getDesc(MCII, *ID).isReturn()) in check() 255 if (HexagonMCInstrInfo::getDesc(MCII, *ID).isBranch()) in check() 261 if (HexagonMCInstrInfo::getDesc(MCII, *ID).mayLoad()) in check() 285 MCInst const *ID = ISJ->getDesc(); in check() 294 if (HexagonMCInstrInfo::getDesc(MCII, *ID).getOpcode() != Hexagon::A2_nop) in check() 304 if (HexagonMCInstrInfo::getDesc(MCII, *ID).isBranch() || in check() 305 HexagonMCInstrInfo::getDesc(MCII, *ID).isCall()) in check() [all …]
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/external/r8/src/main/java/com/android/tools/r8/jar/ |
D | JarRegisterEffectsVisitor.java | 119 visitFieldInsn(Opcodes.GETFIELD, handle.getOwner(), handle.getName(), handle.getDesc()); in registerMethodHandleType() 122 visitFieldInsn(Opcodes.GETSTATIC, handle.getOwner(), handle.getName(), handle.getDesc()); in registerMethodHandleType() 125 visitFieldInsn(Opcodes.PUTFIELD, handle.getOwner(), handle.getName(), handle.getDesc()); in registerMethodHandleType() 128 visitFieldInsn(Opcodes.PUTSTATIC, handle.getOwner(), handle.getName(), handle.getDesc()); in registerMethodHandleType() 132 Opcodes.INVOKEVIRTUAL, handle.getOwner(), handle.getName(), handle.getDesc(), false); in registerMethodHandleType() 136 Opcodes.INVOKEINTERFACE, handle.getOwner(), handle.getName(), handle.getDesc(), true); in registerMethodHandleType() 140 Opcodes.INVOKESPECIAL, handle.getOwner(), handle.getName(), handle.getDesc(), false); in registerMethodHandleType() 144 Opcodes.INVOKESTATIC, handle.getOwner(), handle.getName(), handle.getDesc(), false); in registerMethodHandleType() 148 Opcodes.INVOKESPECIAL, handle.getOwner(), handle.getName(), handle.getDesc(), false); in registerMethodHandleType()
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/external/swiftshader/third_party/LLVM/lib/Target/ |
D | TargetInstrInfo.cpp | 54 unsigned Class = MI->getDesc().getSchedClass(); in getNumMicroOps() 71 unsigned DefClass = DefMI->getDesc().getSchedClass(); in getOperandLatency() 72 unsigned UseClass = UseMI->getDesc().getSchedClass(); in getOperandLatency() 99 return ItinData->getStageLatency(MI->getDesc().getSchedClass()); in getInstrLatency() 119 unsigned DefClass = DefMI->getDesc().getSchedClass(); in hasLowDefLatency() 133 const MCInstrDesc &MCID = MI->getDesc(); in isUnpredicatedTerminator()
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/external/swiftshader/third_party/LLVM/lib/CodeGen/ |
D | TargetInstrInfoImpl.cpp | 62 const MCInstrDesc &MCID = MI->getDesc(); in commuteInstruction() 85 MI->getDesc().getOperandConstraint(Idx1, MCOI::TIED_TO) == 0) { in commuteInstruction() 89 MI->getDesc().getOperandConstraint(Idx2, MCOI::TIED_TO) == 0) { in commuteInstruction() 99 return BuildMI(MF, MI->getDebugLoc(), MI->getDesc()) in commuteInstruction() 104 return BuildMI(MF, MI->getDebugLoc(), MI->getDesc()) in commuteInstruction() 124 const MCInstrDesc &MCID = MI->getDesc(); in findCommutedOpIndices() 142 const MCInstrDesc &MCID = MI->getDesc(); in PredicateInstruction() 221 assert(!Orig->getDesc().isNotDuplicable() && in duplicate() 291 NewMI->getDesc().mayStore()) && in foldMemoryOperand() 294 NewMI->getDesc().mayLoad()) && in foldMemoryOperand() [all …]
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D | PeepholeOptimizer.cpp | 269 unsigned NumDefs = MI->getDesc().getNumDefs(); in OptimizeBitcastInstr() 270 unsigned NumSrcs = MI->getDesc().getNumOperands() - NumDefs; in OptimizeBitcastInstr() 295 if (!DefMI || !DefMI->getDesc().isBitcast()) in OptimizeBitcastInstr() 299 NumDefs = DefMI->getDesc().getNumDefs(); in OptimizeBitcastInstr() 300 NumSrcs = DefMI->getDesc().getNumOperands() - NumDefs; in OptimizeBitcastInstr() 355 const MCInstrDesc &MCID = MI->getDesc(); in isMoveImmediate() 376 for (unsigned i = 0, e = MI->getDesc().getNumOperands(); i != e; ++i) { in FoldImmediate() 431 const MCInstrDesc &MCID = MI->getDesc(); in runOnMachineFunction()
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D | CriticalAntiDepBreaker.cpp | 57 bool IsReturnBlock = (!BB->empty() && BB->back().getDesc().isReturn()); in StartBlock() 196 bool Special = MI->getDesc().isCall() || in PrescanInstruction() 197 MI->getDesc().hasExtraSrcRegAllocReq() || in PrescanInstruction() 209 if (i < MI->getDesc().getNumOperands()) in PrescanInstruction() 210 NewRC = TII->getRegClass(MI->getDesc(), i, TRI); in PrescanInstruction() 297 if (i < MI->getDesc().getNumOperands()) in ScanInstruction() 298 NewRC = TII->getRegClass(MI->getDesc(), i, TRI); in ScanInstruction() 575 if (MI->getDesc().isCall() || MI->getDesc().hasExtraDefRegAllocReq() || in BreakAntiDependencies()
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D | ExecutionDepsFix.cpp | 313 for (unsigned i = mi->getDesc().getNumDefs(), in visitHardInstr() 314 e = mi->getDesc().getNumOperands(); i != e; ++i) { in visitHardInstr() 323 for (unsigned i = 0, e = mi->getDesc().getNumDefs(); i != e; ++i) { in visitHardInstr() 342 for (unsigned i = mi->getDesc().getNumDefs(), in visitSoftInstr() 343 e = mi->getDesc().getNumOperands(); i != e; ++i) { in visitSoftInstr() 427 for (unsigned i = 0, e = mi->getDesc().getNumOperands(); i != e; ++i) { in visitSoftInstr() 441 for (unsigned i = 0, e = mi->getDesc().getNumDefs(); i != e; ++i) { in visitGenericInstr()
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/external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
D | DelaySlotFiller.cpp | 103 if (I->getDesc().hasDelaySlot()) { in runOnMachineBasicBlock() 152 if (slot->getDesc().isCall()) in findDelayInstr() 173 || I->getDesc().hasDelaySlot() in findDelayInstr() 197 if (candidate->getDesc().mayLoad()) { in delayHasHazard() 203 if (candidate->getDesc().mayStore()) { in delayHasHazard() 301 const MCInstrDesc &prevdesc = (--candidate)->getDesc(); in isDelayFiller() 307 if (!I->getDesc().isCall()) in needsUnimp()
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/external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
D | MBlazeDelaySlotFiller.cpp | 112 MCInstrDesc desc = candidate->getDesc(); in delayHasHazard() 159 if (a_is_memory && m->getDesc().mayStore()) in delayHasHazard() 186 MCInstrDesc brdesc = (--candidate)->getDesc(); in isDelayFiller() 214 MCInstrDesc desc = I->getDesc(); in findDelayInstr() 235 if (I->getDesc().hasDelaySlot()) { in runOnMachineBasicBlock()
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/external/llvm/lib/Target/ARM/ |
D | ARMHazardRecognizer.cpp | 22 const MCInstrDesc &MCID = MI->getDesc(); in hasRAWHazard() 43 const MCInstrDesc &MCID = MI->getDesc(); in getHazardType() 46 const MCInstrDesc &LastMCID = LastMI->getDesc(); in getHazardType()
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/external/swiftshader/third_party/LLVM/lib/Support/ |
D | Statistic.cpp | 89 return std::strcmp(LHS->getDesc(), RHS->getDesc()) < 0; in operator ()() 134 << " - " << Stats.Stats[i]->getDesc() << "\n"; in PrintStatistics()
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMHazardRecognizer.cpp | 22 const MCInstrDesc &MCID = MI->getDesc(); in hasRAWHazard() 46 const MCInstrDesc &MCID = MI->getDesc(); in getHazardType() 49 const MCInstrDesc &LastMCID = LastMI->getDesc(); in getHazardType()
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D | ARMCodeEmitter.cpp | 450 const MCInstrDesc &MCID = MI.getDesc(); in getMachineOpValue() 532 switch (MI.getDesc().TSFlags & ARMII::FormMask) { in emitInstruction() 765 const MCInstrDesc &MCID = MI.getDesc(); in emitLEApcrelJTInstruction() 790 unsigned Opcode = MI.getDesc().Opcode; in emitPseudoMoveInstruction() 835 unsigned Opcode = MI.getDesc().Opcode; in emitPseudoInstruction() 1002 const MCInstrDesc &MCID = MI.getDesc(); in emitDataProcessingInstruction() 1100 const MCInstrDesc &MCID = MI.getDesc(); in emitLoadStoreInstruction() 1178 const MCInstrDesc &MCID = MI.getDesc(); in emitMiscLoadStoreInstruction() 1263 const MCInstrDesc &MCID = MI.getDesc(); in emitLoadStoreMultipleInstruction() 1303 const MCInstrDesc &MCID = MI.getDesc(); in emitMulFrmInstruction() [all …]
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/external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
D | MipsDelaySlotFiller.cpp | 99 if (I->getDesc().hasDelaySlot()) { in runOnMachineBasicBlock() 149 || I->getDesc().isPseudo() in findDelayInstr() 177 MCInstrDesc MCID = candidate->getDesc(); in delayHasHazard() 223 MCInstrDesc MCID = MI->getDesc(); in insertDefsUses()
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/external/desugar/java/com/google/devtools/build/android/desugar/ |
D | LambdaDesugaring.java | 111 neededMethod.getDesc(), in visitEnd() 125 Type neededType = Type.getMethodType(neededMethod.getDesc()); in visitEnd() 131 original.getDesc(), original.isInterface()); in visitEnd() 235 invokedMethod.getDesc(), /*itf*/ false); in queueUpBridgeMethodIfNeeded() 240 invokedMethod.getDesc(), /*itf*/ false); in queueUpBridgeMethodIfNeeded() 248 Type.getArgumentTypes(invokedMethod.getDesc())); in queueUpBridgeMethodIfNeeded() 282 Type descriptor = Type.getMethodType(invokedMethod.getDesc()); in findTargetMethod() 537 MethodType signature = MethodType.fromMethodDescriptorString(asmHandle.getDesc(), in toMethodHandle()
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/external/llvm/lib/Target/Mips/ |
D | MipsInstrInfo.cpp | 370 return (MI.getDesc().TSFlags & MipsII::IsCTI) == 0; in SafeInForbiddenSlot() 376 return (MI.getDesc().TSFlags & MipsII::HasForbiddenSlot) != 0; in HasForbiddenSlot() 383 return MI.getDesc().getSize(); in GetInstSizeInBytes() 442 for (unsigned J = 0, E = I->getDesc().getNumOperands(); J < E; ++J) { in genInstrWithNewOpc() 453 for (unsigned J = 2, E = I->getDesc().getNumOperands(); J < E; ++J) { in genInstrWithNewOpc() 458 for (unsigned J = 0, E = I->getDesc().getNumOperands(); J < E; ++J) { in genInstrWithNewOpc()
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/external/llvm/lib/Support/ |
D | Statistic.cpp | 114 return std::strcmp(LHS->getDesc(), RHS->getDesc()) < 0; in sort() 142 Stats.Stats[i]->getDesc()); in PrintStatistics()
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/external/skia/src/gpu/text/ |
D | GrAtlasTextBlob.cpp | 67 return SkGlyphCache::DetachCache(run->fTypeface.get(), effects, desc->getDesc()); in setupCache() 478 SkASSERT_RELEASE(lRun.fDescriptor.getDesc()); in AssertEqual() 479 SkASSERT_RELEASE(rRun.fDescriptor.getDesc()); in AssertEqual() 480 SkASSERT_RELEASE(*lRun.fDescriptor.getDesc() == *rRun.fDescriptor.getDesc()); in AssertEqual() 483 SkASSERT_RELEASE(lRun.fOverrideDescriptor->getDesc()); in AssertEqual() 484 SkASSERT_RELEASE(rRun.fOverrideDescriptor.get() && rRun.fOverrideDescriptor->getDesc()); in AssertEqual() 485 SkASSERT_RELEASE(*lRun.fOverrideDescriptor->getDesc() == in AssertEqual() 486 *rRun.fOverrideDescriptor->getDesc()); in AssertEqual()
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/external/llvm/include/llvm/CodeGen/ |
D | MachineInstr.h | 283 const MCInstrDesc &getDesc() const { return *MCID; } 338 operands_begin() + getDesc().getNumDefs()); 343 operands_begin() + getDesc().getNumDefs()); 348 return make_range(operands_begin() + getDesc().getNumDefs(), 353 return make_range(operands_begin() + getDesc().getNumDefs(), 357 return make_range(operands_begin() + getDesc().getNumDefs(), 361 return make_range(operands_begin() + getDesc().getNumDefs(), 407 return getDesc().getFlags() & (1 << MCFlag);
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/external/llvm/lib/CodeGen/ |
D | TargetSchedule.cpp | 79 int UOps = InstrItins.getNumMicroOps(MI->getDesc().getSchedClass()); in getNumMicroOps() 105 unsigned SchedClass = MI->getDesc().getSchedClass(); in resolveSchedClass() 168 unsigned DefClass = DefMI->getDesc().getSchedClass(); in computeOperandLatency() 212 && !DefMI->getDesc().OpInfo[DefOperIdx].isOptionalDef() in computeOperandLatency()
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/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86VZeroUpper.cpp | 66 assert(MI->getDesc().isCall() && "Isn't a call instruction"); in isCallToModuleFn() 98 if (MI->getDesc().isCall() && !isCallToModuleFn(MI)) { in processBasicBlock()
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/external/skia/debugger/QT/ |
D | SkGLWidget.cpp | 59 GrBackendRenderTargetDesc desc = this->getDesc(this->width(), this->height()); in createRenderTarget() 81 GrBackendRenderTargetDesc SkGLWidget::getDesc(int w, int h) { in getDesc() function in SkGLWidget
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonInstrInfo.cpp | 1355 const uint64_t F = MI.getDesc().TSFlags; in isPredicated() 1437 return MI.getDesc().isPredicable(); in isPredicable() 1466 if (MI.getDesc().isTerminator() || MI.isPosition()) in isSchedulingBoundary() 1707 const uint64_t F = MI->getDesc().TSFlags; in isAccumulator() 1719 && !(MI->getDesc().mayLoad()) in isComplex() 1720 && !(MI->getDesc().mayStore()) in isComplex() 1721 && (MI->getDesc().getOpcode() != Hexagon::S2_allocframe) in isComplex() 1722 && (MI->getDesc().getOpcode() != Hexagon::L2_deallocframe) in isComplex() 1811 if (!MI->getDesc().mayLoad() || !isPredicated(*MI)) in isConditionalLoad() 1902 const uint64_t F = MI->getDesc().TSFlags; in isConstExtended() [all …]
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