Searched refs:getImplicitDefs (Results 1 – 19 of 19) sorted by relevance
233 const unsigned *getImplicitDefs() const { in getImplicitDefs() function
497 const MCPhysReg *getImplicitDefs() const { return ImplicitDefs; } in getImplicitDefs() function
688 bool HasPhysRegOuts = NumResults > II.getNumDefs() && II.getImplicitDefs()!=0; in EmitMachineNode()757 unsigned Reg = II.getImplicitDefs()[i - II.getNumDefs()]; in EmitMachineNode()773 if (const unsigned *IDList = II.getImplicitDefs()) { in EmitMachineNode()
1030 for (const unsigned *ImpDef = MCID.getImplicitDefs(); *ImpDef; ++ImpDef) { in getPhysicalRegisterVT()2632 = TII->get(SU->getNode()->getMachineOpcode()).getImplicitDefs(); in canClobberReachingPhysRegUse()2664 const unsigned *ImpDefs = TII->get(N->getMachineOpcode()).getImplicitDefs(); in canClobberPhysRegDefs()2671 TII->get(SUNode->getMachineOpcode()).getImplicitDefs(); in canClobberPhysRegDefs()
428 for (const unsigned *ImpDef = MCID.getImplicitDefs(); *ImpDef; ++ImpDef) { in getPhysicalRegisterVT()
408 TII->get(N->getMachineOpcode()).getImplicitDefs()) { in AddSchedEdges()
772 bool HasPhysRegOuts = NumResults > NumDefs && II.getImplicitDefs()!=nullptr; in EmitMachineNode()838 unsigned Reg = II.getImplicitDefs()[i - NumDefs]; in EmitMachineNode()873 if (!UsedRegs.empty() || II.getImplicitDefs()) in EmitMachineNode()
443 for (const MCPhysReg *ImpDef = MCID.getImplicitDefs(); *ImpDef; ++ImpDef) { in getPhysicalRegisterVT()522 for (const MCPhysReg *Reg = MCID.getImplicitDefs(); *Reg; ++Reg) { in DelayForLiveRegsBottomUp()
1199 for (const MCPhysReg *ImpDef = MCID.getImplicitDefs(); *ImpDef; ++ImpDef) { in getPhysicalRegisterVT()1328 for (const MCPhysReg *Reg = MCID.getImplicitDefs(); *Reg; ++Reg) in DelayForLiveRegsBottomUp()2698 = TII->get(SU->getNode()->getMachineOpcode()).getImplicitDefs(); in canClobberReachingPhysRegUse()2734 const MCPhysReg *ImpDefs = TII->get(N->getMachineOpcode()).getImplicitDefs(); in canClobberPhysRegDefs()2741 TII->get(SUNode->getMachineOpcode()).getImplicitDefs(); in canClobberPhysRegDefs()
446 TII->get(N->getMachineOpcode()).getImplicitDefs()) { in AddSchedEdges()
87 if (const MCPhysReg *ImpDef = MCID.getImplicitDefs()) in init()
703 if (!D.getImplicitDefs() && !D.getImplicitUses()) in isFixedReg()712 const MCPhysReg *ImpR = Op.isDef() ? D.getImplicitDefs() in isFixedReg()1194 if (const uint16_t *ImpD = In.getDesc().getImplicitDefs()) in buildStmt()
229 for (const MCPhysReg *Regs = MCID.getImplicitDefs(); *Regs; ++Regs) in HasImplicitCPSRDef()
1061 if (const unsigned *Defs = (*I)->getImplicitDefs()) in runOnMachineFunction()
640 for (const MCPhysReg *ImpDefs = MCID->getImplicitDefs(); *ImpDefs; in addImplicitDefUseOperands()
768 for (const MCPhysReg *ImpDefs = MCID.getImplicitDefs(); *ImpDefs; ++ImpDefs) in verifyImplicitOperands()
1782 for (const MCPhysReg *ImpDefs = NewDesc.getImplicitDefs(); in optimizeCompareInstr()
495 if (!MCID.getImplicitDefs() && !MCID.hasOptionalDef()) in DefinesPredicate()
5138 ArrayRef<MCPhysReg> ImpDefs(Desc.getImplicitDefs(), in parseMSInlineAsm()