Searched refs:getSTI (Results 1 – 12 of 12) sorted by relevance
| /external/llvm/lib/MC/MCParser/ |
| D | MCTargetAsmParser.cpp | 25 MCSubtargetInfo &STICopy = getContext().getSubtargetCopy(getSTI()); in copySTI()
30 const MCSubtargetInfo &MCTargetAsmParser::getSTI() const { in getSTI() function in MCTargetAsmParser
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| /external/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 366 if (!(getSTI().getFeatureBits()[Feature])) { in setFeatureBits()
375 if (getSTI().getFeatureBits()[Feature]) { in clearFeatureBits()
385 AssemblerOptions.front()->setFeatures(getSTI().getFeatureBits()); in setModuleFeatureBits()
390 AssemblerOptions.front()->setFeatures(getSTI().getFeatureBits()); in clearModuleFeatureBits()
413 setAvailableFeatures(ComputeAvailableFeatures(getSTI().getFeatureBits())); in MipsAsmParser()
417 llvm::make_unique<MipsAssemblerOptions>(getSTI().getFeatureBits())); in MipsAsmParser()
421 llvm::make_unique<MipsAssemblerOptions>(getSTI().getFeatureBits())); in MipsAsmParser()
447 return getSTI().getFeatureBits()[Mips::FeatureGP64Bit]; in isGP64bit()
450 return getSTI().getFeatureBits()[Mips::FeatureFP64Bit]; in isFP64bit()
457 return getSTI().getFeatureBits()[Mips::FeatureFPXX]; in isABI_FPXX()
[all …]
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| /external/llvm/include/llvm/MC/MCParser/ |
| D | MCTargetAsmParser.h | 124 const MCSubtargetInfo &getSTI() const;
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| /external/llvm/lib/Target/AMDGPU/AsmParser/ |
| D | AMDGPUAsmParser.cpp | 549 return AMDGPU::isSI(getSTI()); in isSI()
553 return AMDGPU::isCI(getSTI()); in isCI()
557 return AMDGPU::isVI(getSTI()); in isVI()
604 if (getSTI().getFeatureBits().none()) { in AMDGPUAsmParser()
609 setAvailableFeatures(ComputeAvailableFeatures(getSTI().getFeatureBits())); in AMDGPUAsmParser()
616 AMDGPU::IsaVersion Isa = AMDGPU::getIsaVersion(getSTI().getFeatureBits()); in AMDGPUAsmParser()
964 TRI, &getSTI(), false); in parseRegister()
1156 Out.EmitInstruction(Inst, getSTI()); in MatchAndEmitInstruction()
1227 AMDGPU::IsaVersion Isa = AMDGPU::getIsaVersion(getSTI().getFeatureBits()); in ParseDirectiveHSACodeObjectISA()
1287 AMDGPU::initDefaultAMDKernelCodeT(Header, getSTI().getFeatureBits()); in ParseDirectiveAMDKernelCodeT()
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| /external/llvm/lib/Target/X86/AsmParser/ |
| D | X86AsmParser.cpp | 762 return getSTI().getFeatureBits()[X86::Mode64Bit]; in is64BitMode()
766 return getSTI().getFeatureBits()[X86::Mode32Bit]; in is32BitMode()
770 return getSTI().getFeatureBits()[X86::Mode16Bit]; in is16BitMode()
808 setAvailableFeatures(ComputeAvailableFeatures(getSTI().getFeatureBits())); in X86AsmParser()
915 } else if (!getSTI().getFeatureBits()[X86::FeatureAVX512]) { in ParseRegister()
1852 if (getSTI().getFeatureBits()[X86::FeatureAVX512] && in ParseIntelOperand()
1917 if (getSTI().getFeatureBits()[X86::FeatureAVX512]) in ParseATTOperand()
1927 if(getSTI().getFeatureBits()[X86::FeatureAVX512]) { in HandleAVX512Operand()
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| /external/llvm/lib/Target/Sparc/AsmParser/ |
| D | SparcAsmParser.cpp | 84 return getSTI().getTargetTriple().getArch() == Triple::sparcv9; in is64Bit()
96 setAvailableFeatures(ComputeAvailableFeatures(getSTI().getFeatureBits())); in SparcAsmParser()
564 Out.EmitInstruction(I, getSTI()); in MatchAndEmitInstruction()
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| /external/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 129 setAvailableFeatures(ComputeAvailableFeatures(getSTI().getFeatureBits())); in AArch64AsmParser()
2520 if (getSTI().getFeatureBits()[AArch64::HasV8_2aOps]) { in parseSysAlias()
2567 if (getSTI().getFeatureBits()[AArch64::HasV8_2aOps]) { in parseSysAlias()
2574 if (getSTI().getFeatureBits()[AArch64::HasV8_2aOps]) { in parseSysAlias()
2782 if (SysReg && SysReg->haveFeatures(getSTI().getFeatureBits())) { in tryParseSysReg()
2790 if (PState && PState->haveFeatures(getSTI().getFeatureBits())) in tryParseSysReg()
4053 Out.EmitInstruction(Inst, getSTI()); in MatchAndEmitInstruction()
4244 if (!getSTI().isCPUStringValid(CPU)) { in parseDirectiveCPU()
4363 getParser().getStreamer().EmitInstruction(Inst, getSTI()); in parseDirectiveTLSDescCall()
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| /external/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 249 return getSTI().getFeatureBits()[ARM::ModeThumb]; in isThumb()
252 return isThumb() && !getSTI().getFeatureBits()[ARM::FeatureThumb2]; in isThumbOne()
255 return isThumb() && getSTI().getFeatureBits()[ARM::FeatureThumb2]; in isThumbTwo()
258 return getSTI().getFeatureBits()[ARM::HasV4TOps]; in hasThumb()
261 return getSTI().getFeatureBits()[ARM::FeatureThumb2]; in hasThumb2()
264 return getSTI().getFeatureBits()[ARM::HasV6Ops]; in hasV6Ops()
267 return getSTI().getFeatureBits()[ARM::HasV6T2Ops]; in hasV6T2Ops()
270 return getSTI().getFeatureBits()[ARM::HasV6MOps]; in hasV6MOps()
273 return getSTI().getFeatureBits()[ARM::HasV7Ops]; in hasV7Ops()
276 return getSTI().getFeatureBits()[ARM::HasV8Ops]; in hasV8Ops()
[all …]
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| /external/llvm/lib/Target/SystemZ/AsmParser/ |
| D | SystemZAsmParser.cpp | 398 setAvailableFeatures(ComputeAvailableFeatures(getSTI().getFeatureBits())); in SystemZAsmParser()
798 Out.EmitInstruction(Inst, getSTI()); in MatchAndEmitInstruction()
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| /external/llvm/lib/CodeGen/AsmPrinter/ |
| D | AsmPrinterInlineAsm.cpp | 151 emitInlineAsmEnd(STI, &TAP->getSTI()); in EmitInlineAsm()
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| /external/llvm/lib/Target/Hexagon/AsmParser/ |
| D | HexagonAsmParser.cpp | 142 setAvailableFeatures(ComputeAvailableFeatures(getSTI().getFeatureBits())); in HexagonAsmParser()
627 HexagonMCChecker Check(MCII, getSTI(), MCB, MCB, *RI); in finishBundle()
629 bool CheckOk = HexagonMCInstrInfo::canonicalizePacket(MCII, getSTI(), in finishBundle()
716 Out.EmitInstruction(MCB, getSTI()); in finishBundle()
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| /external/llvm/lib/Target/PowerPC/AsmParser/ |
| D | PPCAsmParser.cpp | 1200 if (getSTI().getFeatureBits()[PPC::FeatureMFTB]) { in ProcessInstruction()
1243 Out.EmitInstruction(Inst, getSTI()); in MatchAndEmitInstruction()
1728 if (getSTI().getFeatureBits()[PPC::FeatureBookE] && in ParseInstruction()
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