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Searched refs:hasMips32r6 (Results 1 – 16 of 16) sorted by relevance

/external/llvm/lib/Target/Mips/
DMipsSubtarget.h208 bool hasMips32r6() const { in hasMips32r6() function
246 bool inMicroMips32r6Mode() const { return InMicroMipsMode && hasMips32r6(); } in inMicroMips32r6Mode()
291 bool systemSupportsUnalignedAccess() const { return hasMips32r6(); } in systemSupportsUnalignedAccess()
DMipsHazardSchedule.cpp108 if (!STI->hasMips32r6() || STI->inMicroMipsMode()) in runOnMachineFunction()
DMipsInstrInfo.cpp288 if (Subtarget.hasMips32r6() && (I->getNumOperands() > 1) && in getEquivalentCompactForm()
297 if (Subtarget.hasMips32r6() || canUseShortMicroMipsCTI) { in getEquivalentCompactForm()
DMipsSubtarget.cpp108 if (hasMips32r6()) { in MipsSubtarget()
DMipsLongBranch.cpp279 unsigned BalOp = Subtarget.hasMips32r6() ? Mips::BAL : Mips::BAL_BR; in expandToLongBranch()
340 if (Subtarget.hasMips32r6()) in expandToLongBranch()
DMipsRegisterInfo.cpp105 return Subtarget.hasMips32r6() ? CSR_Interrupt_32R6_SaveList in getCalleeSavedRegs()
DMipsDelaySlotFiller.cpp571 if (InMicroMipsMode && STI.hasMips32r6()) { in runOnMachineBasicBlock()
625 (STI.hasMips32r6() && MipsCompactBranchPolicy != CB_Never)) && in runOnMachineBasicBlock()
DMipsISelLowering.cpp234 if (Subtarget.hasMips32r6()) in MipsTargetLowering()
1121 LL = Subtarget.hasMips32r6() in emitAtomicBinary()
1124 SC = Subtarget.hasMips32r6() in emitAtomicBinary()
1268 LL = Subtarget.hasMips32r6() ? (ArePtrs64bit ? Mips::LL64_R6 : Mips::LL_R6) in emitAtomicBinaryPartword()
1270 SC = Subtarget.hasMips32r6() ? (ArePtrs64bit ? Mips::SC64_R6 : Mips::SC_R6) in emitAtomicBinaryPartword()
1409 LL = Subtarget.hasMips32r6() in emitAtomicCmpSwap()
1412 SC = Subtarget.hasMips32r6() in emitAtomicCmpSwap()
1523 LL = Subtarget.hasMips32r6() ? (ArePtrs64bit ? Mips::LL64_R6 : Mips::LL_R6) in emitAtomicCmpSwapPartword()
1525 SC = Subtarget.hasMips32r6() ? (ArePtrs64bit ? Mips::SC64_R6 : Mips::SC_R6) in emitAtomicCmpSwapPartword()
1704 assert(!Subtarget.hasMips32r6() && !Subtarget.hasMips64r6()); in lowerBRCOND()
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DMipsAsmPrinter.cpp107 } else if (Subtarget->hasMips32r6()) { in emitPseudoIndirectBranch()
DMipsSEISelDAGToDAG.cpp1015 } else if (Subtarget->hasMips32r6()) { in SelectInlineAsmMemoryOperand()
DMipsSEISelLowering.cpp155 if (Subtarget.hasMips32r6()) { in MipsSETargetLowering()
534 if (Subtarget.hasMips32() && !Subtarget.hasMips32r6() && in performADDECombine()
1275 assert(!Subtarget.hasMips32r6()); in lowerMulDiv()
DMipsFastISel.cpp208 bool ISASupported = !Subtarget->hasMips32r6() && in MipsFastISel()
DMipsInstrInfo.td174 def HasMips32r6 : Predicate<"Subtarget->hasMips32r6()">,
176 def NotMips32r6 : Predicate<"!Subtarget->hasMips32r6()">,
/external/llvm/lib/Target/Mips/MCTargetDesc/
DMipsABIFlagsSection.h101 if (P.hasMips32r6()) in setISALevelAndRevisionFromPredicates()
/external/llvm/lib/Target/Mips/Disassembler/
DMipsDisassembler.cpp45 bool hasMips32r6() const { in hasMips32r6() function in __anon41367f130111::MipsDisassembler
975 if (hasMips32r6()) { in getInstruction()
1001 if (hasMips32r6()) { in getInstruction()
1021 if (hasMips32r6() && isFP64()) { in getInstruction()
1053 if (hasMips32r6() && isGP64()) { in getInstruction()
1063 if (hasMips32r6() && isPTR64()) { in getInstruction()
1073 if (hasMips32r6()) { in getInstruction()
/external/llvm/lib/Target/Mips/AsmParser/
DMipsAsmParser.cpp506 bool hasMips32r6() const { in hasMips32r6() function in __anon62f483b30211::MipsAsmParser
1593 if (hasMips32r6() && Inst.getOpcode() == Mips::SSNOP) { in processInstruction()
2100 JalrInst.setOpcode(hasMips32r6() ? Mips::JALRC16_MMR6 : Mips::JALR16_MM); in expandJalWithRegs()
2561 Inst.setOpcode(hasMips32r6() ? Mips::BC16_MMR6 : Mips::B16_MM); in expandUncondBranchMMPseudo()
2744 if (inMicroMipsMode() && hasMips32r6()) in expandLoadStoreMultiple()
3173 if (hasMips32r6() || hasMips64r6()) { in expandUlh()
3252 if (hasMips32r6() || hasMips64r6()) { in expandUlw()