Searched refs:ip0 (Results 1 – 15 of 15) sorted by relevance
| /external/llvm/test/CodeGen/X86/ |
| D | extractelement-legalization-store-ordering.ll | 38 %ip0 = shl nsw i32 %i, 2
39 %ip1 = or i32 %ip0, 1
40 %ip2 = or i32 %ip0, 2
41 %ip3 = or i32 %ip0, 3
42 %vecext = extractelement <4 x i32> %am, i32 %ip0
46 %arrayidx8 = getelementptr inbounds i32, i32* %x, i32 %ip0
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| /external/v8/src/debug/arm64/ |
| D | debug-arm64.cc | 68 patcher.ldr_pcrel(ip0, (2 * kInstructionSize) >> kLoadLiteralScaleLog2); in PatchDebugBreakSlot()
76 patcher.blr(ip0); in PatchDebugBreakSlot()
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| /external/vixl/doc/aarch64/topics/ |
| D | extending-the-disassembler.md | 41 custom disasm -0x8: add x10, ip0, ip1 // add/sub to x10
47 custom disasm 0x0: add x11, ip0, ip1
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| /external/clang/test/CXX/temp/temp.arg/temp.arg.nontype/ |
| D | p1-11.cpp | 21 IP<0> ip0; // expected-error{{null non-type template argument must be cast to template parameter ty… variable
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| /external/clang/test/FixIt/ |
| D | fixit-cxx0x.cpp | 107 IP<0> ip0; // expected-error{{null non-type template argument must be cast to template parameter ty… variable
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| /external/v8/src/arm64/ |
| D | deoptimizer-arm64.cc | 54 patcher.ldr_pcrel(ip0, (2 * kInstructionSize) >> kLoadLiteralScaleLog2); in PatchCodeForDeoptimization()
55 patcher.blr(ip0); in PatchCodeForDeoptimization()
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| D | code-stubs-arm64.h | 43 static Register to_be_pushed_lr() { return ip0; } in to_be_pushed_lr()
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| D | macro-assembler-arm64.cc | 46 return CPURegList(ip0, ip1); in DefaultTmpList()
4511 __ ldr_pcrel(ip0, kCodeAgeStubEntryOffset >> kLoadLiteralScaleLog2); in EmitCodeAgeSequence()
4513 __ br(ip0); in EmitCodeAgeSequence()
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| D | assembler-arm64.h | 314 ALIAS_REGISTER(Register, ip0, x16);
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| /external/vixl/examples/aarch64/ |
| D | custom-disassembler.cc | 122 __ Add(x11, ip0, ip1); in GenerateCustomDisassemblerTestCode()
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| /external/v8/src/builtins/arm64/ |
| D | builtins-arm64.cc | 1125 __ Ldr(ip0, MemOperand(kInterpreterDispatchTableRegister, x1)); in Generate_InterpreterEntryTrampoline()
1126 __ Call(ip0); in Generate_InterpreterEntryTrampoline()
1347 __ Ldr(ip0, MemOperand(kInterpreterDispatchTableRegister, x1)); in Generate_InterpreterEnterBytecode()
1348 __ Jump(ip0); in Generate_InterpreterEnterBytecode()
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| /external/vixl/src/aarch64/ |
| D | macro-assembler-aarch64.cc | 316 tmp_list_(ip0, ip1), in MacroAssembler()
337 tmp_list_(ip0, ip1), in MacroAssembler()
356 tmp_list_(ip0, ip1), in MacroAssembler()
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| D | operands-aarch64.h | 465 const XRegister ip0 = x16;
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| /external/v8/src/full-codegen/arm64/ |
| D | full-codegen-arm64.cc | 449 __ ldr_pcrel(ip0, (3 * kInstructionSize) >> kLoadLiteralScaleLog2); in EmitReturnSequence()
450 __ Add(current_sp, current_sp, ip0); in EmitReturnSequence()
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| /external/vixl/test/aarch64/ |
| D | test-assembler-aarch64.cc | 10732 temps.Include(ip0, ip1); in TEST()
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