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/external/valgrind/VEX/priv/
Dguest_arm64_toIR.c12302 Bool isCLZ = bitU == 1; in dis_AdvSIMD_two_reg_misc() local
12305 assign(res, unop(isCLZ ? opsCLZ[size] : opsCLS[size], getQReg128(nn))); in dis_AdvSIMD_two_reg_misc()
12308 DIP("%s %s.%s, %s.%s\n", isCLZ ? "clz" : "cls", in dis_AdvSIMD_two_reg_misc()