/external/llvm/lib/CodeGen/ |
D | MachineInstrBundle.cpp | 175 if (MO.isDead()) { in finalizeBundle() 181 if (!MO.isDead()) in finalizeBundle() 186 if (!MO.isDead()) { in finalizeBundle() 203 bool isDead = DeadDefSet.count(Reg) || KilledDefSet.count(Reg); in finalizeBundle() local 204 MIB.addReg(Reg, getDefRegState(true) | getDeadRegState(isDead) | in finalizeBundle() 331 if (!MO.isDead()) in analyzePhysReg()
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D | DeadMachineInstructionElim.cpp | 51 bool isDead(const MachineInstr *MI) const; 60 bool DeadMachineInstructionElim::isDead(const MachineInstr *MI) const { in isDead() function in DeadMachineInstructionElim 128 if (isDead(MI)) { in runOnMachineFunction()
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D | PHIElimination.cpp | 235 bool isDead = MPhi->getOperand(0).isDead(); in LowerPHINode() local 303 if (isDead) { in LowerPHINode() 331 if (DestLI.endIndex().isDead()) { in LowerPHINode()
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D | MachineCSE.cpp | 253 if (!MO.isDead() && !isPhysDefTriviallyDead(Reg, I, MBB->end())) in hasLivePhysRegDefUses() 544 if (MO.isImplicit() && !MO.isDead() && CSMI->getOperand(i).isDead()) in ProcessBlock() 549 if (MO.isImplicit() && !MO.isDead() && OldReg == NewReg) in ProcessBlock()
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D | MachineInstr.cpp | 178 bool isKill, bool isDead, bool isUndef, in ChangeToRegister() argument 198 IsDead = isDead; in ChangeToRegister() 319 if (isDef() || isKill() || isDead() || isImplicit() || isUndef() || in print() 345 if (isDead()) { in print() 1015 if (Check == CheckKillDead && MO.isDead() != OMO.isDead()) in isIdenticalTo() 1340 MachineInstr::findRegisterDefOperandIdx(unsigned Reg, bool isDead, bool Overlap, in findRegisterDefOperandIdx() argument 1360 if (Found && (!isDead || MO.isDead())) in findRegisterDefOperandIdx() 1645 if (!MO.isDead()) in allDefsAreDead() 2038 } else if (hasAliases && MO.isDead() && in addRegisterDead()
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D | TailDuplicator.cpp | 141 bool isDead = MBB->pred_empty() && !MBB->hasAddressTaken(); in tailDuplicateAndUpdate() local 143 updateSuccessorsPHIs(MBB, isDead, TDBBs, Succs); in tailDuplicateAndUpdate() 146 if (isDead) { in tailDuplicateAndUpdate() 421 MachineBasicBlock *FromBB, bool isDead, in updateSuccessorsPHIs() argument 445 if (isDead) { in updateSuccessorsPHIs()
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D | DetectDeadLanes.cpp | 370 if (Def.isDead()) in determineInitialDefinedLanes() 412 if (DefMI.isImplicitDef() || Def.isDead()) in determineInitialDefinedLanes() 549 if (MO.isDef() && !MO.isDead() && RegInfo.UsedLanes == 0) { in runOnce()
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/external/swiftshader/third_party/LLVM/lib/CodeGen/ |
D | DeadMachineInstructionElim.cpp | 44 bool isDead(const MachineInstr *MI) const; 56 bool DeadMachineInstructionElim::isDead(const MachineInstr *MI) const { in isDead() function in DeadMachineInstructionElim 129 if (isDead(MI)) { in runOnMachineFunction()
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D | ExpandPostRAPseudos.cpp | 139 if (MI->getOperand(0).isDead()) in LowerSubregToReg() 160 if (DstMO.isDead() || SrcMO.isUndef() || MI->getNumOperands() > 2) { in LowerCopy() 176 if (DstMO.isDead()) in LowerCopy()
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D | MachineInstr.cpp | 156 bool isKill, bool isDead, bool isUndef, in ChangeToRegister() argument 179 IsDead = isDead; in ChangeToRegister() 242 if (isDef() || isKill() || isDead() || isImplicit() || isUndef() || in print() 259 if (isKill() || isDead() || isUndef()) { in print() 262 if (isDead()) OS << "dead"; in print() 264 if (isKill() || isDead()) in print() 770 if (Check == CheckKillDead && MO.isDead() != OMO.isDead()) in isIdenticalTo() 946 MachineInstr::findRegisterDefOperandIdx(unsigned Reg, bool isDead, bool Overlap, in findRegisterDefOperandIdx() argument 962 if (Found && (!isDead || MO.isDead())) in findRegisterDefOperandIdx() 1104 if (!MO.isReg() || (!MO.isKill() && !MO.isDead())) in copyKillDeadInfo() [all …]
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D | PHIElimination.cpp | 200 bool isDead = MPhi->getOperand(0).isDead(); in LowerAtomicPHINode() local 270 if (isDead) { in LowerAtomicPHINode()
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D | TailDuplication.cpp | 94 void UpdateSuccessorsPHIs(MachineBasicBlock *FromBB, bool isDead, 207 bool isDead = MBB->pred_empty() && !MBB->hasAddressTaken(); in TailDuplicateAndUpdate() local 209 UpdateSuccessorsPHIs(MBB, isDead, TDBBs, Succs); in TailDuplicateAndUpdate() 212 if (isDead) { in TailDuplicateAndUpdate() 442 TailDuplicatePass::UpdateSuccessorsPHIs(MachineBasicBlock *FromBB, bool isDead, in UpdateSuccessorsPHIs() argument 464 if (isDead) { in UpdateSuccessorsPHIs()
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D | RegAllocFast.cpp | 602 } else if (MO.isDead()) { in reloadVirtReg() 613 } else if (MO.isDead()) { in reloadVirtReg() 631 return MO.isKill() || MO.isDead(); in setPhysReg() 644 return MO.isDead(); in setPhysReg() 900 definePhysReg(MI, Reg, (MO.isImplicit() || MO.isDead()) ? in AllocateBasicBlock() 986 definePhysReg(MI, Reg, (MO.isImplicit() || MO.isDead()) ? in AllocateBasicBlock()
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/external/r8/src/main/java/com/android/tools/r8/ir/code/ |
D | Value.java | 504 public boolean isDead(InternalOptions options) { in isDead() method in Value 506 return numberOfAllUsers() == 0 || isDead(new HashSet<>(), options); in isDead() 509 protected boolean isDead(Set<Value> active, InternalOptions options) { in isDead() method in Value 526 if (!active.contains(outValue) && !outValue.isDead(active, options)) { in isDead() 531 if (!active.contains(phi) && !phi.isDead(active, options)) { in isDead()
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/external/llvm/include/llvm/CodeGen/ |
D | MachineOperand.h | 292 bool isDead() const { in isDead() function 581 bool isKill = false, bool isDead = false, 607 bool isKill = false, bool isDead = false, 613 assert(!(isDead && !isDef) && "Dead flag on non-def"); 619 Op.IsDead = isDead;
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D | TailDuplicator.h | 71 void updateSuccessorsPHIs(MachineBasicBlock *FromBB, bool isDead,
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/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
D | MachineOperand.h | 246 bool isDead() const { in isDead() function 464 bool isKill = false, bool isDead = false, 490 bool isKill = false, bool isDead = false, 499 Op.IsDead = isDead;
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D | MachineInstr.h | 376 bool isDead = false, bool Overlap = false, 381 MachineOperand *findRegisterDefOperand(unsigned Reg, bool isDead = false, 383 int Idx = findRegisterDefOperandIdx(Reg, isDead, false, TRI);
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/external/llvm/lib/Target/ARM/ |
D | ARMExpandPseudoInsts.cpp | 405 bool DstIsDead = MI.getOperand(OpIdx).isDead(); in ExpandVLD() 539 DstIsDead = MI.getOperand(OpIdx).isDead(); in ExpandLaneOp() 671 bool DstIsDead = MI.getOperand(0).isDead(); in ExpandMOV32BitImm() 818 .addReg(Dest.getReg(), getKillRegState(Dest.isDead())) in ExpandCMP_SWAP() 875 MIB.addReg(RegLo, Flags | getKillRegState(Reg.isDead())); in addExclusiveRegPair() 876 MIB.addReg(RegHi, Flags | getKillRegState(Reg.isDead())); in addExclusiveRegPair() 878 MIB.addReg(Reg.getReg(), Flags | getKillRegState(Reg.isDead())); in addExclusiveRegPair() 932 .addReg(DestLo, getKillRegState(Dest.isDead())) in ExpandCMP_SWAP_64() 933 .addReg(DesiredLo, getKillRegState(Desired.isDead()))); in ExpandCMP_SWAP_64() 938 .addReg(DestHi, getKillRegState(Dest.isDead())) in ExpandCMP_SWAP_64() [all …]
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/external/r8/src/main/java/com/android/tools/r8/ir/optimize/ |
D | DeadCodeRemover.java | 74 if (phi.isDead(options)) { in removeDeadPhis() 119 if (!outValue.isDead(options)) { in removeDeadInstructions()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64ExpandPseudoInsts.cpp | 128 const bool DstIsDead = MI.getOperand(0).isDead(); in tryOrrMovk() 193 const bool DstIsDead = MI.getOperand(0).isDead(); in tryToreplicateChunks() 376 const bool DstIsDead = MI.getOperand(0).isDead(); in trySequenceOfOnes() 552 bool DstIsDead = MI.getOperand(0).isDead(); in expandMOVImm() 635 .addReg(Dest.getReg(), getKillRegState(Dest.isDead())) in expandCMP_SWAP() 718 .addReg(DestLo.getReg(), getKillRegState(DestLo.isDead())) in expandCMP_SWAP_128() 722 .addReg(DestHi.getReg(), getKillRegState(DestHi.isDead())) in expandCMP_SWAP_128()
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/external/llvm/lib/Target/WebAssembly/ |
D | WebAssemblyOptimizeLiveIntervals.cpp | 96 if (MI->isImplicitDef() && MI->getOperand(0).isDead()) { in runOnMachineFunction()
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/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86InstrInfo.cpp | 1251 if (MO.isDef()) return MO.isDead(); in isSafeToClobberEFLAGS() 1314 MO.getReg() == X86::EFLAGS && !MO.isDead()) { in hasLiveCondCodeDef() 1333 bool isDead = MI->getOperand(0).isDead(); in convertToThreeAddressWithLEA() local 1411 .addReg(Dest, RegState::Define | getDeadRegState(isDead)) in convertToThreeAddressWithLEA() 1420 if (isDead) in convertToThreeAddressWithLEA() 1446 bool isDead = MI->getOperand(0).isDead(); in convertToThreeAddress() local 1468 .addReg(A, RegState::Define | getDeadRegState(isDead)) in convertToThreeAddress() 1485 .addReg(Dest, RegState::Define | getDeadRegState(isDead)) in convertToThreeAddress() 1505 .addReg(Dest, RegState::Define | getDeadRegState(isDead)) in convertToThreeAddress() 1520 .addReg(Dest, RegState::Define | getDeadRegState(isDead)) in convertToThreeAddress() [all …]
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMBaseInstrInfo.h | 305 bool isDead = false) { 306 return MIB.addReg(ARM::CPSR, getDefRegState(true) | getDeadRegState(isDead));
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/external/swiftshader/src/Reactor/ |
D | Optimizer.cpp | 39 bool isDead(Ice::Inst *instruction); 98 if(isDead(&inst)) in eliminateDeadCode() 462 bool Optimizer::isDead(Ice::Inst *instruction) in isDead() function in __anon87a4a6cd0111::Optimizer
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