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Searched refs:isNullConstant (Results 1 – 11 of 11) sorted by relevance

/external/llvm/lib/CodeGen/SelectionDAG/
DDAGCombiner.cpp1664 if (isNullConstant(N1)) in visitADD()
1681 if (N0.getOpcode() == ISD::SUB && isNullConstant(N0.getOperand(0))) in visitADD()
1684 if (N1.getOpcode() == ISD::SUB && isNullConstant(N1.getOperand(0))) in visitADD()
1732 isNullConstant(N1.getOperand(0).getOperand(0))) in visitADD()
1738 isNullConstant(N0.getOperand(0).getOperand(0))) in visitADD()
1798 if (isNullConstant(N1)) in visitADDC()
1979 if (isNullConstant(N1)) in visitSUBC()
2474 if (isNullConstant(N1)) in visitMULHS()
2515 if (isNullConstant(N1)) in visitMULHU()
2874 if (isNullConstant(LR) && Op1 == ISD::SETEQ) { in visitANDLike()
[all …]
DSelectionDAG.cpp6681 bool llvm::isNullConstant(SDValue V) { in isNullConstant() function in llvm
/external/llvm/lib/Target/AArch64/
DAArch64ISelLowering.cpp1225 if (RHS.getOpcode() == ISD::SUB && isNullConstant(RHS.getOperand(0)) && in emitComparison()
1239 } else if (LHS.getOpcode() == ISD::AND && isNullConstant(RHS) && in emitComparison()
1310 if (isNullConstant(SubOp0) && (CC == ISD::SETEQ || CC == ISD::SETNE)) { in emitConditionalComparison()
3978 if (isNullConstant(TVal.getOperand(0))) { in LowerSELECT_CC()
4772 if (!isNullConstant(Op)) in LowerAsmOperandForConstraint()
9142 if (!isNullConstant(N0.getOperand(1))) in performAcrossLaneMinMaxReductionCombine()
9146 if (!isNullConstant(IfTrue.getOperand(1))) in performAcrossLaneMinMaxReductionCombine()
9183 if (!isNullConstant(N1)) in performAcrossLaneAddReductionCombine()
9621 if (isNullConstant(LHS)) in performBRCONDCombine()
9624 if (!isNullConstant(RHS)) in performBRCONDCombine()
/external/llvm/lib/Target/X86/
DX86ISelLowering.cpp4354 return isNullConstant(Elt) || isNullFPConstant(Elt); in isZeroNode()
12270 isa<ConstantSDNode>(CondElt) ? i + (isNullConstant(CondElt) ? Size : 0) in lowerVSELECTtoVectorShuffle()
12337 if (isNullConstant(Op.getOperand(1))) in LowerEXTRACT_VECTOR_ELT_SSE4()
12360 isNullConstant(Op.getOperand(1))) && in LowerEXTRACT_VECTOR_ELT_SSE4()
14861 if (isNullConstant(Op1)) in EmitCmp()
15587 isNullConstant(Op1) && in LowerSETCC()
15601 if ((isOneConstant(Op1) || isNullConstant(Op1)) && in LowerSETCC()
15608 bool Invert = (CC == ISD::SETNE) ^ isNullConstant(Op1); in LowerSETCC()
15629 if (!isNullConstant(Op1)) { in LowerSETCC()
15833 isNullConstant(Cond.getOperand(1).getOperand(1))) { in LowerSELECT()
[all …]
/external/llvm/include/llvm/CodeGen/
DSelectionDAGNodes.h1361 bool isNullConstant(SDValue V);
/external/llvm/lib/Target/Lanai/
DLanaiISelLowering.cpp1280 return AllOnes ? isAllOnesConstant(N) : isNullConstant(N); in isZeroOrAllOnes()
/external/llvm/lib/Target/Sparc/
DSparcISelLowering.cpp1912 if (isNullConstant(RHS) && in LookThroughSetCC()
1920 isNullConstant(LHS.getOperand(1))) { in LookThroughSetCC()
/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp1642 LeadingZero &= isNullConstant(UniquedVals[i]); in get_VSPLTI_elt()
7125 else if (isNullConstant(BVN->getOperand(i))) in LowerBUILD_VECTOR()
10557 if (isNullConstant(N->getOperand(0))) // 0 << V -> 0. in PerformDAGCombine()
10561 if (isNullConstant(N->getOperand(0))) // 0 >>u V -> 0. in PerformDAGCombine()
11115 !isNullConstant(LHS.getOperand(1))) in PerformDAGCombine()
/external/llvm/lib/Target/AMDGPU/
DR600ISelLowering.cpp1105 return isNullConstant(Op); in isHWFalseValue()
DAMDGPUISelLowering.cpp2967 if (!isNullConstant(Op.getOperand(1))) in ComputeNumSignBitsForTargetNode()
/external/llvm/lib/Target/ARM/
DARMISelLowering.cpp3413 isNullConstant(BitcastOp->getOperand(0))) in isFloatingPointZero()
8589 return AllOnes ? isAllOnesConstant(N) : isNullConstant(N); in isZeroOrAllOnes()
10834 if (!isNullConstant(CmpZ->getOperand(1))) in PerformCMOVToBFICombine()