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Searched refs:isRegBase (Results 1 – 3 of 3) sorted by relevance

/external/llvm/lib/Target/WebAssembly/
DWebAssemblyFastISel.cpp68 bool isRegBase() const { return Kind == RegBase; } in isRegBase() function in __anon2a93b38d0111::WebAssemblyFastISel::Address
71 assert(isRegBase() && "Invalid base register access!"); in setReg()
75 assert(isRegBase() && "Invalid base register access!"); in getReg()
249 if (S == 1 && Addr.isRegBase() && Addr.getReg() == 0) { in computeAddress()
325 if (Addr.isRegBase()) { in materializeLoadStoreOperands()
349 if (Addr.isRegBase()) in addLoadStoreOperands()
/external/llvm/lib/Target/Mips/
DMipsFastISel.cpp62 bool isRegBase() const { return Kind == RegBase; } in isRegBase() function in __anon36dd7ac30111::MipsFastISel::Address
65 assert(isRegBase() && "Invalid base register access!"); in setReg()
69 assert(isRegBase() && "Invalid base register access!"); in getReg()
756 if (Addr.isRegBase()) { in emitLoad()
807 if (Addr.isRegBase()) { in emitStore()
/external/llvm/lib/Target/AArch64/
DAArch64FastISel.cpp71 bool isRegBase() const { return Kind == RegBase; } in isRegBase() function in __anon618e55a30111::AArch64FastISel::Address
74 assert(isRegBase() && "Invalid base register access!"); in setReg()
78 assert(isRegBase() && "Invalid base register access!"); in getReg()
835 if (Addr.isRegBase() && !Addr.getReg()) { in computeAddress()
969 if (Addr.isRegBase() && Addr.getOffsetReg() && !Addr.getReg()) in simplifyAddress()
1058 assert(Addr.isRegBase() && "Unexpected address kind."); in addLoadStoreOperands()
1767 bool UseRegOffset = Addr.isRegBase() && !Addr.getOffset() && Addr.getReg() && in emitLoad()
2034 bool UseRegOffset = Addr.isRegBase() && !Addr.getOffset() && Addr.getReg() && in emitStore()