| /external/llvm/test/CodeGen/MIR/X86/ |
| D | liveout-register-mask.mir | 2 # This test ensures that the MIR parser parses the liveout register mask
38 ; CHECK: PATCHPOINT 5, 5, 0, 2, 0, %rdi, %rsi, csr_64, liveout(%esp, %rsp, %sp, %spl),
39 …PATCHPOINT 5, 5, 0, 2, 0, %rdi, %rsi, csr_64, liveout(%esp, %rsp, %sp, %spl), implicit-def dead ea…
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| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| D | brw_fs_live_variables.cpp | 169 ~bd->liveout[i]); in compute_live_variables()
171 bd->liveout[i] |= new_liveout; in compute_live_variables()
186 (bd->liveout[i] & in compute_live_variables()
220 if (BITSET_TEST(bd->liveout, i)) { in compute_start_end()
262 block_data[i].liveout = rzalloc_array(mem_ctx, BITSET_WORD, bitset_words); in fs_live_variables()
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| D | brw_vec4_live_variables.cpp | 148 ~bd->liveout[i]); in compute_live_variables()
150 bd->liveout[i] |= new_liveout; in compute_live_variables()
165 (bd->liveout[i] & in compute_live_variables()
197 block_data[i].liveout = rzalloc_array(mem_ctx, BITSET_WORD, bitset_words); in vec4_live_variables()
299 if (BITSET_TEST(bd->liveout, i)) { in calculate_live_intervals()
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| D | brw_fs_copy_propagation.cpp | 66 BITSET_WORD *liveout; member
124 bd[block->num].liveout = rzalloc_array(bd, BITSET_WORD, bitset_words); in fs_copy_prop_dataflow()
183 bd[block->num].liveout[i] = bd[block->num].copy[i]; in setup_initial_values()
187 bd[block->num].liveout[i] = 0u; in setup_initial_values()
212 const BITSET_WORD old_liveout = bd[block->num].liveout[i]; in run()
214 bd[block->num].liveout[i] = in run()
218 if (old_liveout != bd[block->num].liveout[i]) in run()
236 bd[block->num].livein[i] &= bd[parent->num].liveout[i]; in run()
262 fprintf(stderr, "%08x", bd[block->num].liveout[i]); in dump_block_data()
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| D | brw_fs_live_variables.h | 53 BITSET_WORD *liveout; member
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| D | brw_schedule_instructions.cpp | 453 this->liveout = ralloc_array(mem_ctx, BITSET_WORD *, block_count); in instruction_scheduler()
455 this->liveout[i] = rzalloc_array(mem_ctx, BITSET_WORD, in instruction_scheduler()
471 this->liveout = NULL; in instruction_scheduler()
539 BITSET_WORD **liveout; member in instruction_scheduler
643 if (BITSET_TEST(v->live_intervals->block_data[block].liveout, i)) in setup_liveness()
644 BITSET_SET(liveout[block], v->live_intervals->vgrf_from_var[i]); in setup_liveness()
661 BITSET_SET(liveout[block], i); in setup_liveness()
726 !BITSET_TEST(liveout[block_idx], inst->src[i].nr) && in get_register_pressure_benefit()
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| D | brw_vec4_live_variables.h | 51 BITSET_WORD *liveout; member
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| D | brw_fs_dead_code_eliminate.cpp | 85 memcpy(live, live_intervals->block_data[block->num].liveout, in dead_code_eliminate()
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| D | brw_vec4_dead_code_eliminate.cpp | 51 memcpy(live, live_intervals->block_data[block->num].liveout, in dead_code_eliminate()
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| /external/mesa3d/src/gallium/drivers/freedreno/ir3/ |
| D | ir3_ra.c | 250 BITSET_WORD *liveout; /* which defs reach exit point of block */ member
632 bd->liveout = rzalloc_array(bd, BITSET_WORD, bitset_words); in ra_block_compute_live_ranges()
782 (bd->use[i] | (bd->liveout[i] & ~bd->def[i])); in ra_compute_livein_liveout()
802 (succ_bd->livein[i] & ~bd->liveout[i]); in ra_compute_livein_liveout()
805 bd->liveout[i] |= new_liveout; in ra_compute_livein_liveout()
862 print_bitset("l/o", bd->liveout, ctx->alloc_count); in ra_add_interference()
876 if (BITSET_TEST(bd->liveout, i)) { in ra_add_interference()
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| /external/llvm/docs/ |
| D | StackMaps.rst | 382 At each callsite, a "liveout" register list is also recorded. These
388 Each entry in the liveout register list contains a DWARF register
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | README.txt | 298 Unfortunately, liveout information is currently unavailable during DAG combine
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| /external/llvm/lib/Target/ARM/ |
| D | README.txt | 298 Unfortunately, liveout information is currently unavailable during DAG combine
|