| /external/llvm/test/MC/Disassembler/ARM/ |
| D | thumb2-v8.txt | 30 # CHECK: mrrc p14
33 # CHECK: mrrc p15
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| D | basic-arm-instructions-v8.txt | 48 # CHECK: mrrc p14
51 # CHECK: mrrc p15
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| D | invalid-thumbv8.txt | 99 # CHECK-V7: mrrc
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| D | invalid-armv8.txt | 99 # CHECK-V7: mrrc
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| D | thumb2.txt | 1098 # CHECK: mrrc p7, #1, r5, r4, c1
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| D | basic-arm-instructions.txt | 827 # CHECK: mrrc p7, #1, r5, r4, c1
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| /external/llvm/test/CodeGen/ARM/ |
| D | intrinsics-coprocessor.ll | 38 ; CHECK: mrrc p1, #2, r{{[0-9]+}}, r{{[0-9]+}}, c3
39 %2 = tail call { i32, i32 } @llvm.arm.mrrc(i32 1, i32 2, i32 3) nounwind
77 declare { i32, i32 } @llvm.arm.mrrc(i32, i32, i32) nounwind
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| D | special-reg.ll | 15 ; ARM: mrrc p1, #2, r0, r1, c3
|
| /external/clang/test/CodeGen/ |
| D | builtins-arm.c | 197 uint64_t mrrc() { in mrrc() function
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| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | thumb2-diagnostics.s | 37 mrrc p7, #16, r5, r4, c1
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| D | diagnostics.s | 112 mrrc p7, #16, r5, r4, c1
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| D | basic-arm-instructions.s | 888 mrrc p7, #1, r5, r4, c1
891 @ CHECK: mrrc p7, #1, r5, r4, c1 @ encoding: [0x11,0x57,0x54,0xec]
|
| D | basic-thumb2-instructions.s | 1154 mrrc p7, #1, r5, r4, c1
1157 @ CHECK: mrrc p7, #1, r5, r4, c1 @ encoding: [0x54,0xec,0x11,0x57]
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| /external/llvm/test/MC/ARM/ |
| D | thumb2-diagnostics.s | 40 mrrc p7, #16, r5, r4, c1
|
| D | diagnostics.s | 180 mrrc p7, #16, r5, r4, c1
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| D | basic-thumb2-instructions.s | 1537 mrrc p7, #1, r5, r4, c1
1540 @ CHECK: mrrc p7, #1, r5, r4, c1 @ encoding: [0x54,0xec,0x11,0x57]
|
| D | basic-arm-instructions.s | 1398 mrrc p7, #1, r5, r4, c1
1401 @ CHECK: mrrc p7, #1, r5, r4, c1 @ encoding: [0x11,0x57,0x54,0xec]
|
| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 726 # CHECK: mrrc p7, #1, r5, r4, c1
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| D | thumb2.txt | 981 # CHECK: mrrc p7, #1, r5, r4, c1
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 3700 def t2MRRC : t2MovRRCopro<0b1110, "mrrc", 1>;
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| D | ARMInstrInfo.td | 4523 def MRRC : MovRRCopro<"mrrc", 1 /* from coprocessor to ARM core register */>;
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 4253 def t2MRRC : t2MovRRCopro<0b1110, "mrrc", 1, (outs GPR:$Rt, GPR:$Rt2),
|
| D | ARMInstrInfo.td | 5142 def MRRC : MovRRCopro<"mrrc", 1 /* from coprocessor to ARM core register */,
|
| /external/swiftshader/third_party/llvm-subzero/build/Android/include/llvm/IR/ |
| D | Intrinsics.gen | 555 arm_mrrc, // llvm.arm.mrrc
6613 "llvm.arm.mrrc",
14553 3, // llvm.arm.mrrc
|
| /external/swiftshader/third_party/llvm-subzero/build/MacOS/include/llvm/IR/ |
| D | Intrinsics.gen | 550 arm_mrrc, // llvm.arm.mrrc
6574 "llvm.arm.mrrc",
14459 3, // llvm.arm.mrrc
|