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Searched refs:nooddspreg (Results 1 – 14 of 14) sorted by relevance

/external/llvm/test/MC/Mips/
Dnooddspreg-cmdarg.s1 # RUN: llvm-mc %s -arch=mips -mcpu=mips32 -mattr=+fp64,+nooddspreg | \
4 # RUN: llvm-mc %s -arch=mips -mcpu=mips32 -mattr=+fp64,+nooddspreg -filetype=obj -o - | \
8 # RUN: not llvm-mc %s -arch=mips -mcpu=mips64 -target-abi n32 -mattr=+nooddspreg 2> %t0
11 # RUN: not llvm-mc %s -arch=mips -mcpu=mips64 -target-abi n64 -mattr=+nooddspreg 2> %t0
14 # CHECK-ASM-NOT: .module nooddspreg
Dset-oddspreg-nooddspreg.s1 # RUN: llvm-mc %s -triple=mips-unknown-linux -mcpu=mips32r2 -mattr=+nooddspreg | \
6 .set nooddspreg define
10 # CHECK: .set nooddspreg
Dset-oddspreg-nooddspreg-error.s1 # RUN: not llvm-mc %s -triple=mips-unknown-linux -mcpu=mips32 -mattr=+nooddspreg 2>%t1
8 .set nooddspreg define
Dupdate-module-level-options.s1 # RUN: not llvm-mc %s -arch=mips -mcpu=mips32 -mattr=+fp64,-nooddspreg 2>&1 | \
4 .module nooddspreg
Dnooddspreg-error.s5 .module nooddspreg
6 # CHECK-ASM: .module nooddspreg
Dnooddspreg.s14 # CHECK-ASM: .module nooddspreg
40 .module nooddspreg
/external/llvm/test/CodeGen/Mips/
Dno-odd-spreg.ll2 ; RUN: llc -march=mipsel -mcpu=mips32 -mattr=+nooddspreg < %s | FileCheck %s -check-prefixes=ALL,NO…
4 ; RUN: llc -march=mipsel -mcpu=mips32r6 -mattr=fp64,+nooddspreg < %s | FileCheck %s -check-prefixes…
5 ; RUN: llc -march=mipsel -mcpu=mips32r6 -mattr=fpxx,-nooddspreg < %s | FileCheck %s -check-prefixes…
11 ; NOODDSPREG: .module nooddspreg
58 ; INVALID: -mattr=+nooddspreg is not currently permitted for a 32-bit FPU register file (FR=0 mode).
Dfp64a.ll15 ; RUN: llc -march=mips -mcpu=mips32r2 -mattr=fp64,nooddspreg < %s | FileCheck %s -check-prefixes=AL…
17 ; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=fp64,nooddspreg < %s | FileCheck %s -check-prefixes=…
20 ; RUN: not llc -march=mips64 -mcpu=mips64 -mattr=fp64,nooddspreg < %s 2>&1 | FileCheck %s -check-pr…
22 ; RUN: not llc -march=mips64el -mcpu=mips64 -mattr=fp64,nooddspreg < %s 2>&1 | FileCheck %s -check-…
24 ; 64-FP64A: LLVM ERROR: -mattr=+nooddspreg requires the O32 ABI.
Dno-odd-spreg-msa.ll1 ; RUN: llc -march=mipsel -mcpu=mips32 -mattr=+fp64,+msa,-nooddspreg \
4 ; RUN: llc -march=mipsel -mcpu=mips32 -mattr=+fp64,+msa,+nooddspreg \
Dfastcc.ll4 ; RUN: llc < %s -march=mipsel -mcpu=mips32 -mattr=+nooddspreg -relocation-model=pic | FileCheck %s …
5 ; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -mattr=+fp64,+nooddspreg -relocation-model=pic | FileC…
Ddelay-slot-fill-forward.ll164 …buffer-size"="8" "target-cpu"="mips32r2" "target-features"="+mips32r2,+nooddspreg,+fpxx" "unsafe-f…
/external/llvm/test/CodeGen/Mips/llvm-ir/
Dcall.ll9 ; RUN: llc -march=mips -mcpu=mips32r6 -relocation-model=pic -mattr=+fp64,+nooddspreg -disable-mip…
/external/llvm/lib/Target/Mips/
DMips.td82 def FeatureNoOddSPReg : SubtargetFeature<"nooddspreg", "UseOddSPReg", "false",
DMipsRegisterInfo.td382 // Used to reserve odd registers when given -mattr=+nooddspreg