/external/llvm/test/Bitcode/ |
D | pr18704.ll | 25 ; <STRUCT_NAME abbrevid=7 op0=115 op1=116 op2=114 op3=117 op4=99 op5=116 op6=46 op7=112 op8=97 o… 41 ; <GLOBALVAR abbrevid=4 op0=2 op1=0 op2=0 op3=0 op4=0 op5=0/> 42 ; <GLOBALVAR abbrevid=4 op0=2 op1=0 op2=0 op3=0 op4=0 op5=0/> 43 ; <GLOBALVAR abbrevid=4 op0=2 op1=0 op2=0 op3=0 op4=0 op5=0/> 44 ; <GLOBALVAR op0=4 op1=1 op2=25 op3=9 op4=0 op5=0 op6=0 op7=0 op8=1 op9=0/> 45 ; <GLOBALVAR op0=6 op1=1 op2=26 op3=9 op4=0 op5=0 op6=0 op7=0 op8=1 op9=0/> 46 ; <GLOBALVAR op0=8 op1=1 op2=27 op3=9 op4=0 op5=0 op6=0 op7=0 op8=1 op9=0/> 47 ; <GLOBALVAR abbrevid=4 op0=10 op1=1 op2=28 op3=3 op4=0 op5=0/> 48 ; <GLOBALVAR abbrevid=4 op0=6 op1=1 op2=26 op3=3 op4=0 op5=0/> 49 ; <GLOBALVAR abbrevid=4 op0=13 op1=1 op2=31 op3=3 op4=0 op5=0/> [all …]
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D | module_hash.ll | 3 ; MOD1: <HASH op0={{[0-9]*}} op1={{[0-9]*}} op2={{[0-9]*}} op3={{[0-9]*}} op4={{[0-9]*}} (match)/> 5 ; MOD2: <HASH op0={{[0-9]*}} op1={{[0-9]*}} op2={{[0-9]*}} op3={{[0-9]*}} op4={{[0-9]*}} (match)/> 24 …9]*]] op1=[[HASH1_2:[0-9]*]] op2=[[HASH1_3:[0-9]*]] op3=[[HASH1_4:[0-9]*]] op4=[[HASH1_5:[0-9]*]] … 25 …9]*]] op1=[[HASH2_2:[0-9]*]] op2=[[HASH2_3:[0-9]*]] op3=[[HASH2_4:[0-9]*]] op4=[[HASH2_5:[0-9]*]] … 28 …brevid={{[0-9]*}} op0=[[HASH1_1]] op1=[[HASH1_2]] op2=[[HASH1_3]] op3=[[HASH1_4]] op4=[[HASH1_5]]/> 29 …brevid={{[0-9]*}} op0=[[HASH2_1]] op1=[[HASH2_2]] op2=[[HASH2_3]] op3=[[HASH2_4]] op4=[[HASH2_5]]/>
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D | thinlto-function-summary-refgraph.ll | 14 ; CHECK-DAG: <PERMODULE {{.*}} op0=[[MAINID:[0-9]+]] op1=0 {{.*}} op3=1 op4=[[FUNCID:[0-9]+]] op… 16 ; CHECK-DAG: <PERMODULE {{.*}} op0=[[WID:[0-9]+]] op1=5 {{.*}} op3=1 op4=[[GLOBALVARID:[0-9]+]] … 19 ; CHECK-DAG: <PERMODULE {{.*}} op0=[[XID:[0-9]+]] op1=1 {{.*}} op3=1 op4=[[FOOID:[0-9]+]] op5=[[… 23 ; CHECK-DAG: <PERMODULE {{.*}} op0=[[YID:[0-9]+]] op1=8 {{.*}} op3=0 op4=[[FUNC2ID:[0-9]+]] op5=… 27 ; CHECK-DAG: <PERMODULE {{.*}} op0=[[ZID:[0-9]+]] op1=3 {{.*}} op3=0 op4=[[FUNC2ID:[0-9]+]] op5=…
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D | thinlto-function-summary-callgraph.ll | 12 ; CHECK-NEXT: <PERMODULE {{.*}} op4=[[FUNCID:[0-9]+]] op5=1/>
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D | thinlto-function-summary-callgraph-pgo.ll | 12 ; CHECK-NEXT: <PERMODULE_PROFILE {{.*}} op4=[[FUNCID:[0-9]+]] op5=1 op6=1/>
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D | thinlto-alias.ll | 12 ; CHECK-NEXT: <PERMODULE {{.*}} op4=[[FUNCID:[0-9]+]] op5=1/>
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D | metadata-function-blocks.ll | 49 ; CHECK-NEXT: <NODE op0=8 op1=3 op2=9 op3=7 op4=5/>
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/external/llvm/test/Transforms/SLPVectorizer/X86/ |
D | propagate_ir_flags.ll | 26 %op4 = lshr exact i32 %load4, 1 31 store i32 %op4, i32* %idx4, align 4 52 %op4 = lshr exact i32 %load4, 1 57 store i32 %op4, i32* %idx4, align 4 78 %op4 = add nsw i32 %load4, 1 83 store i32 %op4, i32* %idx4, align 4 104 %op4 = add i32 %load4, 1 109 store i32 %op4, i32* %idx4, align 4 130 %op4 = add nuw i32 %load4, 1 135 store i32 %op4, i32* %idx4, align 4 [all …]
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMInstrNEON.td | 1815 bits<2> op17_16, bits<5> op11_7, bit op4, string OpcodeStr, 1817 : N2V<op24_23, op21_20, op19_18, op17_16, op11_7, 0, op4, (outs DPR:$Vd), 1821 bits<2> op17_16, bits<5> op11_7, bit op4, string OpcodeStr, 1823 : N2V<op24_23, op21_20, op19_18, op17_16, op11_7, 1, op4, (outs QPR:$Vd), 1829 bits<2> op17_16, bits<5> op11_7, bit op4, 1832 : N2V<op24_23, op21_20, op19_18, op17_16, op11_7, 0, op4, (outs DPR:$Vd), 1836 bits<2> op17_16, bits<5> op11_7, bit op4, 1839 : N2V<op24_23, op21_20, op19_18, op17_16, op11_7, 1, op4, (outs QPR:$Vd), 1845 bits<2> op17_16, bits<5> op11_7, bit op6, bit op4, 1848 : N2V<op24_23, op21_20, op19_18, op17_16, op11_7, op6, op4, (outs DPR:$Vd), [all …]
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D | ARMInstrFormats.td | 1429 class ADbI<bits<5> opcod1, bits<2> opcod2, bit op6, bit op4, dag oops, 1451 let Inst{4} = op4; 1489 class ASbI<bits<5> opcod1, bits<2> opcod2, bit op6, bit op4, dag oops, dag iops, 1510 let Inst{4} = op4; 1515 class ASbIn<bits<5> opcod1, bits<2> opcod2, bit op6, bit op4, dag oops, 1518 : ASbI<opcod1, opcod2, op6, op4, oops, iops, itin, opc, asm, pattern> { 1549 class AVConv1XI<bits<5> op1, bits<2> op2, bits<4> op3, bits<4> op4, bit op5, 1552 : AVConv1I<op1, op2, op3, op4, oops, iops, itin, opc, asm, pattern> { 1692 bit op5, bit op4, 1703 let Inst{4} = op4; [all …]
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/external/llvm/lib/Target/ARM/ |
D | ARMInstrNEON.td | 2434 bits<2> op17_16, bits<5> op11_7, bit op4, string OpcodeStr, 2436 : N2V<op24_23, op21_20, op19_18, op17_16, op11_7, 0, op4, (outs DPR:$Vd), 2440 bits<2> op17_16, bits<5> op11_7, bit op4, string OpcodeStr, 2442 : N2V<op24_23, op21_20, op19_18, op17_16, op11_7, 1, op4, (outs QPR:$Vd), 2448 bits<2> op17_16, bits<5> op11_7, bit op4, 2451 : N2V<op24_23, op21_20, op19_18, op17_16, op11_7, 0, op4, (outs DPR:$Vd), 2455 bits<2> op17_16, bits<5> op11_7, bit op4, 2458 : N2V<op24_23, op21_20, op19_18, op17_16, op11_7, 1, op4, (outs QPR:$Vd), 2498 bits<2> op17_16, bits<5> op11_7, bit op6, bit op4, 2501 : N2V<op24_23, op21_20, op19_18, op17_16, op11_7, op6, op4, (outs DPR:$Vd), [all …]
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D | ARMInstrFormats.td | 1656 class ADbI<bits<5> opcod1, bits<2> opcod2, bit op6, bit op4, dag oops, 1678 let Inst{4} = op4; 1776 class ASbI<bits<5> opcod1, bits<2> opcod2, bit op6, bit op4, dag oops, dag iops, 1797 let Inst{4} = op4; 1831 class ASbIn<bits<5> opcod1, bits<2> opcod2, bit op6, bit op4, dag oops, 1834 : ASbI<opcod1, opcod2, op6, op4, oops, iops, itin, opc, asm, pattern> { 1905 class AHbI<bits<5> opcod1, bits<2> opcod2, bit op6, bit op4, dag oops, dag iops, 1927 let Inst{4} = op4; 1973 class AVConv1XI<bits<5> op1, bits<2> op2, bits<4> op3, bits<4> op4, bit op5, 1976 : AVConv1I<op1, op2, op3, op4, oops, iops, itin, opc, asm, pattern> { [all …]
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D | ARMInstrVFP.td | 1528 class AVConv1XInsS_Encode<bits<5> op1, bits<2> op2, bits<4> op3, bits<4> op4, 1531 : AVConv1XI<op1, op2, op3, op4, op5, oops, iops, itin, opc, asm, pattern>, 1540 class AVConv1XInsD_Encode<bits<5> op1, bits<2> op2, bits<4> op3, bits<4> op4, 1543 : AVConv1XI<op1, op2, op3, op4, op5, oops, iops, itin, opc, asm, pattern>,
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/external/llvm/test/FileCheck/ |
D | simple-var-capture.txt | 9 op4 r30, r18, r21 11 ; CHECK-NEXT: op4 {{r[0-9]+}}, [[REGa]], [[REGb]]
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D | var-ref-same-line.txt | 12 op4 g1, g2, g1
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/external/libvpx/libvpx/vpx_dsp/arm/ |
D | loopfilter_neon.c | 314 uint8x8_t *op4, uint8x8_t *op3, uint8x8_t *op2, uint8x8_t *op1, in apply_15_tap_filter_8() argument 331 *op4 = apply_15_tap_filter_8_kernel(flat2, p7, p5, p4, q2, p4, &sum); in apply_15_tap_filter_8() 352 uint8x16_t *op4, uint8x16_t *op3, uint8x16_t *op2, uint8x16_t *op1, in apply_15_tap_filter_16() argument 382 *op4 = apply_15_tap_filter_16_kernel(flat2, p7, p5, p4, q2, p4, &sum0, &sum1); in apply_15_tap_filter_16() 488 uint8x##w##_t *op4, uint8x##w##_t *op3, uint8x##w##_t *op2, \ 505 q2, q3, q4, q5, q6, q7, op6, op5, op4, op3, \ 954 uint8x##w##_t *op4, uint8x##w##_t *op3, uint8x##w##_t *op2, \ 970 op5, op4, op3, op2, op1, op0, oq0, oq1, oq2, oq3, oq4, oq5, \ 981 op5, op4, op3, op2, op1, op0, oq0, oq1, oq2, oq3, oq4, oq5, oq6; in vpx_lpf_horizontal_16_neon() local 987 q2, q3, q4, q5, q6, q7, &op6, &op5, &op4, &op3, &op2, &op1, in vpx_lpf_horizontal_16_neon() [all …]
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D | highbd_loopfilter_neon.c | 198 uint16x8_t *op4, uint16x8_t *op3, uint16x8_t *op2, uint16x8_t *op1, in apply_15_tap_filter() argument 215 *op4 = apply_15_tap_filter_kernel(flat2, p7, p5, p4, q2, p4, &sum); in apply_15_tap_filter() 321 const uint16x8_t q7, uint16x8_t *op6, uint16x8_t *op5, uint16x8_t *op4, in filter16() argument 338 q4, q5, q6, q7, op6, op5, op4, op3, op2, op1, op0, in filter16() 670 q3, q4, q5, q6, q7, op6, op5, op4, op3, op2, op1, op0, oq0, oq1, oq2, oq3, in lpf_horizontal_16_kernel() local 681 p3, p2, p1, p0, q0, q1, q2, q3, q4, q5, q6, q7, &op6, &op5, &op4, in lpf_horizontal_16_kernel() 684 store_8x14(s, p, op6, op5, op4, op3, op2, op1, op0, oq0, oq1, oq2, oq3, oq4, in lpf_horizontal_16_kernel() 693 q3, q4, q5, q6, q7, op6, op5, op4, op3, op2, op1, op0, oq0, oq1, oq2, oq3, in lpf_vertical_16_kernel() local 710 p3, p2, p1, p0, q0, q1, q2, q3, q4, q5, q6, q7, &op6, &op5, &op4, in lpf_vertical_16_kernel() 715 store_7x8(s - 3, p, op6, op5, op4, op3, op2, op1, op0); in lpf_vertical_16_kernel()
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D | loopfilter_16_neon.asm | 99 vst1.u8 {d25}, [r8@64], r1 ; store op4 655 vbif d25, d3, d17 ; op4 |= p4 & ~(f2 & f & m)
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/external/libvpx/libvpx/vpx_dsp/mips/ |
D | loopfilter_filters_dspr2.h | 507 uint32_t *op7, uint32_t *op6, uint32_t *op5, uint32_t *op4, uint32_t *op3, in wide_mbfilter_dspr2() argument 511 const uint32_t p7 = *op7, p6 = *op6, p5 = *op5, p4 = *op4; in wide_mbfilter_dspr2() 631 *op4 = res_op4; in wide_mbfilter_dspr2()
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/external/libvpx/libvpx/vpx_dsp/ |
D | loopfilter.c | 234 uint8_t *op5, uint8_t *op4, uint8_t *op3, in filter16() argument 240 const uint8_t p7 = *op7, p6 = *op6, p5 = *op5, p4 = *op4, p3 = *op3, in filter16() 251 *op4 = ROUND_POWER_OF_TWO( in filter16() 578 uint16_t *op5, uint16_t *op4, uint16_t *op3, in highbd_filter16() argument 587 const uint16_t p4 = *op4; in highbd_filter16() 606 *op4 = ROUND_POWER_OF_TWO( in highbd_filter16()
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/external/libdrm/freedreno/kgsl/ |
D | msm_kgsl.h | 384 unsigned int op4; member
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/external/valgrind/VEX/priv/ |
D | guest_s390_toIR.c | 175 qop(IROp kind, IRExpr *op1, IRExpr *op2, IRExpr *op3, IRExpr *op4) in qop() argument 177 return IRExpr_Qop(kind, op1, op2, op3, op4); in qop()
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