| /external/libpng/contrib/intel/ |
| D | configure.ac.patch | 9 # In order to compile Intel SSE optimizations for libpng, please add
20 [Enable Intel SSE optimizations: =no/off, yes/on:]
21 [no/off: disable the optimizations;]
22 [yes/on: enable the optimizations.]
28 [Disable Intel SSE optimizations])
33 [Enable Intel SSE optimizations]);;
39 # or where Intel optimizations were explicitly requested (this allows a
|
| D | INSTALL | 60 [Enable Intel SSE optimizations: =no/off, yes/on:]
61 [no/off: disable the optimizations;]
62 [yes/on: enable the optimizations.]
68 [Disable Intel SSE optimizations])
73 [Enable Intel SSE optimizations]);;
79 # or where Intel optimizations were explicitly requested (this allows a
106 * enable SSE optimizations. This means that these optimizations will
|
| D | intel_sse.patch | 20 + [Enable Intel SSE optimizations: =no/off, yes/on:]
21 + [no/off: disable the optimizations;]
22 + [yes/on: enable the optimizations.]
28 + [Disable Intel SSE optimizations])
33 + [Enable Intel SSE optimizations]);;
39 +# or where Intel optimizations were explicitly requested (this allows a
96 + * enable SSE optimizations. This means that these optimizations will
|
| /external/swiftshader/third_party/LLVM/docs/HistoricalNotes/ |
| D | 2001-06-01-GCCOptimizations2.txt | 10 If we were to reimplement any of these optimizations, I assume that we
14 Static optimizations, xlation unit at a time:
17 Link time optimizations:
20 Of course, many optimizations could be shared between llvmopt and
24 > BTW, about SGI, "borrowing" SSA-based optimizations from one compiler and
31 optimizations are written in C++ and are actually somewhat
35 > But your larger point is valid that adding SSA based optimizations is
46 optimization" happens right along with other data optimizations (ie, CSE
49 As far as REAL back end optimizations go, it looks something like this:
|
| D | 2001-06-01-GCCOptimizations.txt | 7 Take a look at this document (which describes the order of optimizations
31 I've marked optimizations with a [t] to indicate things that I believe to
36 optimizations are done on the tree representation].
38 Given the lack of "strong" optimizations that would take a long time to
41 SSA based optimizations that could be adapted (besides the fact that their
|
| /external/llvm/docs/HistoricalNotes/ |
| D | 2001-06-01-GCCOptimizations2.txt | 10 If we were to reimplement any of these optimizations, I assume that we
14 Static optimizations, xlation unit at a time:
17 Link time optimizations:
20 Of course, many optimizations could be shared between llvmopt and
24 > BTW, about SGI, "borrowing" SSA-based optimizations from one compiler and
31 optimizations are written in C++ and are actually somewhat
35 > But your larger point is valid that adding SSA based optimizations is
46 optimization" happens right along with other data optimizations (ie, CSE
49 As far as REAL back end optimizations go, it looks something like this:
|
| D | 2001-06-01-GCCOptimizations.txt | 7 Take a look at this document (which describes the order of optimizations
31 I've marked optimizations with a [t] to indicate things that I believe to
36 optimizations are done on the tree representation].
38 Given the lack of "strong" optimizations that would take a long time to
41 SSA based optimizations that could be adapted (besides the fact that their
|
| /external/libpng/ |
| D | configure.ac | 310 [Enable ARM NEON optimizations: =no/off, check, api, yes/on:]
311 [no/off: disable the optimizations; check: use internal checking code]
319 [Disable ARM Neon optimizations])
327 [Turn on ARM Neon optimizations at run-time]);;
330 [Enable ARM Neon optimizations])
332 [you want the optimizations unconditionally pass -mfpu=neon]
339 # where ARM optimizations were explicitly requested (this allows a fallback if a
356 [Enable MIPS MSA optimizations: =no/off, check, api, yes/on:]
357 [no/off: disable the optimizations; check: use internal checking code]
365 [Disable MIPS MSA optimizations])
[all …]
|
| D | Android.bp | 47 // Disable optimizations because they crash on windows
55 // Disable optimizations because they crash on windows
|
| /external/pdfium/third_party/libpng16/contrib/intel/ |
| D | INSTALL | 60 [Enable Intel SSE optimizations: =no/off, yes/on:]
61 [no/off: disable the optimizations;]
62 [yes/on: enable the optimizations.]
68 [Disable Intel SSE optimizations])
73 [Enable Intel SSE optimizations]);;
79 # or where Intel optimizations were explicitly requested (this allows a
106 * enable SSE optimizations. This means that these optimizations will
|
| D | intel_sse.patch | 20 + [Enable Intel SSE optimizations: =no/off, yes/on:]
21 + [no/off: disable the optimizations;]
22 + [yes/on: enable the optimizations.]
28 + [Disable Intel SSE optimizations])
33 + [Enable Intel SSE optimizations]);;
39 +# or where Intel optimizations were explicitly requested (this allows a
94 + * enable SSE optimizations. This means that these optimizations will
|
| /external/skia/third_party/libpng/contrib/intel/ |
| D | INSTALL | 69 [Enable Intel SSE optimizations: =no/off, yes/on:]
70 [no/off: disable the optimizations;]
71 [yes/on: enable the optimizations.]
77 [Disable Intel SSE optimizations])
82 [Enable Intel SSE optimizations]);;
88 # or where Intel optimizations were explicitly requested (this allows a
124 * enable SSE optimizations. This means that these optimizations will
|
| D | intel_sse.patch | 34 + [Enable Intel SSE optimizations: =no/off, yes/on:]
35 + [no/off: disable the optimizations;]
36 + [yes/on: enable the optimizations.]
42 + [Disable Intel SSE optimizations])
47 + [Enable Intel SSE optimizations]);;
53 +# or where Intel optimizations were explicitly requested (this allows a
122 + * enable SSE optimizations. This means that these optimizations will
|
| /external/llvm/docs/CommandGuide/ |
| D | opt.rst | 13 takes LLVM source files as input, runs the specified optimizations or analyses
25 optimized output file. The optimizations available via :program:`opt` depend
28 option to determine what optimizations you can use.
77 applying other optimizations. It is essentially the same as :option:`-strip`
106 line options to enable various optimizations or analyses. To see the new
107 complete list of optimizations, use the :option:`-help` and :option:`-load`
|
| D | llc.rst | 96 Disable optimizations that may produce excess precision for floating point.
102 Enable optimizations that assume no Inf values.
106 Enable optimizations that assume no NAN values.
110 Enable optimizations that make unsafe assumptions about IEEE math (e.g. that
112 optimizations allow the code generator to make use of some instructions which
|
| /external/proguard/src/proguard/ant/ |
| D | ConfigurationTask.java | 61 … configuration.optimizations = extendClassSpecifications(configuration.optimizations, in appendTo()
62 … this.configuration.optimizations); in appendTo()
215 configuration.optimizations = extendFilter(configuration.optimizations, in addConfiguredOptimization()
|
| /external/proguard/src/proguard/gui/ |
| D | OptimizationsDialog.java | 189 public void setFilter(String optimizations) in setFilter() argument
191 StringMatcher filter = optimizations != null && optimizations.length() > 0 ? in setFilter()
192 new ListParser(new NameParser()).parse(optimizations) : in setFilter()
|
| /external/skia/resources/ |
| D | slides_content2.lua | 77 - Separate pass for optimizations (optional)
81 - GPU optimizations
94 Skia In Blink : MPD optimizations*
|
| /external/swiftshader/third_party/LLVM/docs/CommandGuide/ |
| D | opt.pod | 14 source files as input, runs the specified optimizations or analyses on it, and then
25 output file. The optimizations available via B<opt> depend upon what
28 what optimizations you can use.
89 applying other optimizations. It is essentially the same as B<-strip> but it
123 enable various optimizations or analyses. To see the new complete list of
124 optimizations, use the B<-help> and B<-load> options together. For example:
|
| D | llc.pod | 83 Disable optimizations that may produce excess precision for floating point.
89 Enable optimizations that assume no Inf values.
93 Enable optimizations that assume no NAN values.
97 Enable optimizations that make unsafe assumptions about IEEE math (e.g. that
99 optimizations allow the code generator to make use of some instructions which
|
| /external/mesa3d/src/gallium/drivers/r300/compiler/tests/ |
| D | radeon_compiler_regalloc_tests.c | 51 unsigned optimizations = 1; in test_runner_rc_regalloc() local
63 rc_pair_schedule(c, &optimizations); in test_runner_rc_regalloc()
|
| /external/llvm/test/Instrumentation/AddressSanitizer/ |
| D | instrument_load_then_store.ll | 15 ; With optimizations enabled we should see only one call to __asan_report_*
21 ; Without optimizations we should see two calls to __asan_report_*
|
| /external/mesa3d/src/compiler/nir/ |
| D | nir_opt_algebraic.py | 65 optimizations = [ variable
459 optimizations += [
474 optimizations += [(bitfield_reverse('x@32'), ('bitfield_reverse', 'x'))]
480 optimizations += [
499 optimizations += [
531 print nir_algebraic.AlgebraicPass("nir_opt_algebraic", optimizations).render()
|
| /external/python/cpython2/Modules/_ctypes/libffi/testsuite/lib/ |
| D | libffi.exp | 284 set optimizations { "-O0" "-O2" "-O3" "-Os" "-O2 -fomit-frame-pointer" }
288 set optimizations { "" }
311 foreach opt $optimizations {
|
| /external/icu/icu4c/source/config/ |
| D | mh-beos | 14 # Safe optimizations
20 # -fexpensive-optimizations -foptimize-register-move -fregmove \
32 # use any O optimizations at all. (the behavior kicks in at -O1)
|