Searched refs:pipeConfig (Results 1 – 7 of 7) sorted by relevance
112 numPipes = GetPipePerSurf(pTileInfo->pipeConfig); in HwlGetPipes()133 AddrPipeCfg pipeConfig ///< [in] pipe config in GetPipePerSurf()138 switch (pipeConfig) in GetPipePerSurf()208 switch (pTileInfo->pipeConfig) in ComputePipeFromCoord()590 AddrPipeCfg pipeConfig, ///< [in] pipe config in TileCoordToMaskElementIndex() argument605 switch(pipeConfig) in TileCoordToMaskElementIndex()742 if ((pTileInfo->pipeConfig == ADDR_PIPECFG_P8_32x64_32x32) || in HwlComputeTileDataWidthAndHeightLinear()743 (pTileInfo->pipeConfig == ADDR_PIPECFG_P16_32x32_8x16) || in HwlComputeTileDataWidthAndHeightLinear()744 (pTileInfo->pipeConfig == ADDR_PIPECFG_P8_32x32_16x16)) in HwlComputeTileDataWidthAndHeightLinear()874 TileCoordToMaskElementIndex(tx, ty, pTileInfo->pipeConfig, µShift, &elemIdxBits); in HwlComputeXmaskAddrFromCoord()[all …]
472 (macroTiled && pInfo->pipeConfig != m_tileTable[index].info.pipeConfig)) in HwlPostCheckTileIndex()479 if ((pInfo->pipeConfig == m_tileTable[index].info.pipeConfig) && in HwlPostCheckTileIndex()580 pInfo->pipeConfig = pCfgTable->info.pipeConfig; in HwlSetupTileCfg()1239 pCfg->info.pipeConfig = static_cast<AddrPipeCfg>(gbTileMode.f.pipe_config + 1); in ReadGbTileMode()1525 pTileInfo->pipeConfig = m_tileTable[tileIndex].info.pipeConfig; in HwlComputeMacroModeIndex()1576 switch (pTileInfo->pipeConfig) in HwlComputeTileDataWidthAndHeightLinear()
236 UINT_32 tx, UINT_32 ty, AddrPipeCfg pipeConfig,251 UINT_32 GetPipePerSurf(AddrPipeCfg pipeConfig) const;
3954 (pTileInfo->pipeConfig != 0) in IsTileInfoAllZero()4249 pTileInfoOut->pipeConfig = pTileInfoIn->pipeConfig; in HwlConvertTileInfoToHW()
415 AddrTileInfoIn.pipeConfig = surf->pipe_config + 1; /* +1 compared to GB_TILE_MODE */ in radv_amdgpu_winsys_surface_init()468 surf->pipe_config = AddrSurfInfoOut.pTileInfo->pipeConfig - 1; in radv_amdgpu_winsys_surface_init()
449 AddrTileInfoIn.pipeConfig = surf->pipe_config + 1; /* +1 compared to GB_TILE_MODE */ in amdgpu_surface_init()509 surf->pipe_config = AddrSurfInfoOut.pTileInfo->pipeConfig - 1; in amdgpu_surface_init()
401 AddrPipeCfg pipeConfig; ///< Pipe Config = HW enum + 1 member