| /external/libvpx/libvpx/vpx_dsp/mips/ |
| D | idct16x16_msa.c | 331 v8i16 res8, res9, res10, res11, res12, res13, res14, res15; in vpx_iadst16_1d_columns_addblk_msa() local
431 ILVR_B2_SH(zero, dst12, zero, dst13, res12, res13); in vpx_iadst16_1d_columns_addblk_msa()
432 ADD2(res12, out12, res13, out13, res12, res13); in vpx_iadst16_1d_columns_addblk_msa()
433 CLIP_SH2_0_255(res12, res13); in vpx_iadst16_1d_columns_addblk_msa()
434 PCKEV_B2_SH(res12, res12, res13, res13, res12, res13); in vpx_iadst16_1d_columns_addblk_msa()
435 ST8x1_UB(res12, dst + 2 * dst_stride); in vpx_iadst16_1d_columns_addblk_msa()
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| /external/llvm/test/Bitcode/ |
| D | miscInstructions.3.2.ll | 108 ; CHECK-NEXT: %res12 = icmp eq <2 x i32> %vec1, %vec2
109 %res12 = icmp eq <2 x i32> %vec1, %vec2
150 ; CHECK-NEXT: %res12 = fcmp ueq float %x1, %x2
151 %res12 = fcmp ueq float %x1, %x2
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| D | memInstructions.3.2.ll | 63 ; CHECK-NEXT: %res12 = load volatile i8, i8* %ptr1, align 1, !invariant.load !1
64 %res12 = load volatile i8, i8* %ptr1, align 1, !invariant.load !1
119 ; CHECK-NEXT: %res12 = load atomic i8, i8* %ptr1 singlethread seq_cst, align 1
120 %res12 = load atomic i8, i8* %ptr1 singlethread seq_cst, align 1
274 ; CHECK-NEXT: %res12 = extractvalue { i32, i1 } [[TMP]], 0
275 %res12 = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new singlethread release monotonic
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| /external/swiftshader/third_party/subzero/crosstest/ |
| D | test_vector_ops_ll.ll | 173 %res12 = zext <16 x i1> %res12_i1 to <16 x i8>
174 ret <16 x i8> %res12
327 %res12 = insertelement <16 x i8> %vec, i8 %elt, i32 12
328 ret <16 x i8> %res12
517 %res12 = zext i1 %res12_i1 to i64
518 ret i64 %res12
693 %res12 = zext i8 %res12_i8 to i64
694 ret i64 %res12
|
| /external/clang/test/SemaCXX/ |
| D | altivec.cpp | 31 int res12[vec_step(vf) == 4 ? 1 : -1]; in test_vec_step() local
|
| /external/clang/test/SemaOpenCL/ |
| D | vec_step.cl | 27 int res12[vec_step(void) == 1 ? 1 : -1];
|
| /external/libvpx/libvpx/vpx_dsp/x86/ |
| D | fwd_txfm_impl_sse2.h | 621 __m128i res08, res09, res10, res11, res12, res13, res14, res15; in FDCT16x16_2D() local
794 res12 = mult_round_shift(&t2, &t3, &k__cospi_m08_p24, in FDCT16x16_2D()
797 overflow = check_epi16_overflow_x4(&res00, &res08, &res04, &res12); in FDCT16x16_2D()
999 transpose_and_output8x8(&res08, &res09, &res10, &res11, &res12, &res13, in FDCT16x16_2D()
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| /external/mesa3d/src/gallium/drivers/llvmpipe/ |
| D | lp_state_setup.c | 220 LLVMValueRef max, max_value, res12; in lp_do_offset_tri() local
250 res12 = LLVMBuildFSub(b, dyzzx01_dzxyz20, dzx01_dyz20, "res12"); in lp_do_offset_tri()
253 dzdxdzdy = LLVMBuildFMul(b, res12, inv_det, "dzdxdzdy"); in lp_do_offset_tri()
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| /external/swiftshader/third_party/subzero/tests_lit/assembler/x86/ |
| D | opcode_register_encodings.ll | 129 %res12 = add <16 x i8> %res1, %res2
130 %res123 = add <16 x i8> %res12, %res3
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| /external/llvm/test/CodeGen/X86/ |
| D | avx-intrinsics-fast-isel.ll | 2008 %res12 = insertelement <32 x i8> %res11, i8 %a19, i32 12
2009 %res13 = insertelement <32 x i8> %res12, i8 %a18, i32 13
2112 %res12 = insertelement <16 x i16> %res11, i16 %a3 , i32 12
2113 %res13 = insertelement <16 x i16> %res12, i16 %a2 , i32 13
2339 %res12 = insertelement <32 x i8> %res11, i8 %a0, i32 12
2340 %res13 = insertelement <32 x i8> %res12, i8 %a0, i32 13
2392 %res12 = insertelement <16 x i16> %res11, i16 %a0, i32 12
2393 %res13 = insertelement <16 x i16> %res12, i16 %a0, i32 13
2645 %res12 = insertelement <32 x i8> %res11, i8 %a12, i32 12
2646 %res13 = insertelement <32 x i8> %res12, i8 %a13, i32 13
[all …]
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| D | sse2-intrinsics-fast-isel.ll | 2153 %res12 = insertelement <16 x i8> %res11, i8 %a3 , i32 12
2154 %res13 = insertelement <16 x i8> %res12, i8 %a2 , i32 13
2340 %res12 = insertelement <16 x i8> %res11, i8 %a0, i32 12
2341 %res13 = insertelement <16 x i8> %res12, i8 %a0, i32 13
2547 %res12 = insertelement <16 x i8> %res11, i8 %a12, i32 12
2548 %res13 = insertelement <16 x i8> %res12, i8 %a13, i32 13
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| D | avx512-intrinsics.ll | 4802 %res12 = or i8 %res3, %res4
4803 %res13 = or i8 %res11, %res12
4846 %res12 = and i8 %res3, %res4
4847 %res13 = and i8 %res11, %res12
4973 %res12 = fadd <2 x double> %res2, %res3
4974 %res13 = fadd <2 x double> %res11, %res12
4998 %res12 = fadd <4 x float> %res2, %res3
4999 %res13 = fadd <4 x float> %res11, %res12
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