| /external/llvm/test/CodeGen/SystemZ/ |
| D | shift-08.ll | 8 ; CHECK: rllg %r2, %r2, 1
19 ; CHECK: rllg %r2, %r2, 63
30 ; CHECK-NOT: rllg
41 ; CHECK: rllg %r2, %r2, 0(%r3)
53 ; CHECK: rllg %r2, %r2, 10(%r3)
66 ; CHECK: rllg %r2, %r2, 10(%r3)
81 ; CHECK: rllg %r2, %r2, 10(%r3)
97 ; CHECK: rllg %r2, %r2, 524287(%r3)
112 ; CHECK: rllg %r2, %r2, 0(%r3)
125 ; CHECK: rllg %r2, %r2, -1(%r3)
[all …]
|
| D | rot-01.ll | 25 ; CHECK: rllg %r2, %r2, 0(%r3)
|
| D | rot-02.ll | 58 ; CHECK: rllg %r2, %r2, 0(%r3)
|
| /external/llvm/test/MC/SystemZ/ |
| D | insn-bad.s | 2947 #CHECK: rllg %r0,%r0,-524289
2949 #CHECK: rllg %r0,%r0,524288
2951 #CHECK: rllg %r0,%r0,0(%r0)
2953 #CHECK: rllg %r0,%r0,0(%r1,%r2)
2955 rllg %r0,%r0,-524289
2956 rllg %r0,%r0,524288
2957 rllg %r0,%r0,0(%r0)
2958 rllg %r0,%r0,0(%r1,%r2)
|
| D | insn-good.s | 8366 #CHECK: rllg %r0, %r0, 0 # encoding: [0xeb,0x00,0x00,0x00,0x00,0x1c]
8367 #CHECK: rllg %r15, %r1, 0 # encoding: [0xeb,0xf1,0x00,0x00,0x00,0x1c]
8368 #CHECK: rllg %r1, %r15, 0 # encoding: [0xeb,0x1f,0x00,0x00,0x00,0x1c]
8369 #CHECK: rllg %r15, %r15, 0 # encoding: [0xeb,0xff,0x00,0x00,0x00,0x1c]
8370 #CHECK: rllg %r0, %r0, -524288 # encoding: [0xeb,0x00,0x00,0x00,0x80,0x1c]
8371 #CHECK: rllg %r0, %r0, -1 # encoding: [0xeb,0x00,0x0f,0xff,0xff,0x1c]
8372 #CHECK: rllg %r0, %r0, 1 # encoding: [0xeb,0x00,0x00,0x01,0x00,0x1c]
8373 #CHECK: rllg %r0, %r0, 524287 # encoding: [0xeb,0x00,0x0f,0xff,0x7f,0x1c]
8374 #CHECK: rllg %r0, %r0, 0(%r1) # encoding: [0xeb,0x00,0x10,0x00,0x00,0x1c]
8375 #CHECK: rllg %r0, %r0, 0(%r15) # encoding: [0xeb,0x00,0xf0,0x00,0x00,0x1c]
[all …]
|
| /external/v8/src/compiler/s390/ |
| D | code-generator-s390.cc | 1516 __ rllg(i.OutputRegister(), i.InputRegister(0), kScratchReg); in AssembleArchInstruction() local
1518 __ rllg(i.OutputRegister(), i.InputRegister(0), in AssembleArchInstruction() local
1532 __ rllg(i.OutputRegister(), i.InputRegister(0), Operand(shiftAmount)); in AssembleArchInstruction() local
1549 __ rllg(i.OutputRegister(), i.InputRegister(0), Operand(shiftAmount)); in AssembleArchInstruction() local
1564 __ rllg(i.OutputRegister(), i.InputRegister(0), Operand(shiftAmount)); in AssembleArchInstruction() local
|
| /external/v8/src/s390/ |
| D | assembler-s390.h | 1076 void rllg(Register r1, Register r3, const Operand& opnd);
1077 void rllg(Register r1, Register r3, const Register opnd);
1078 void rllg(Register r1, Register r3, Register r2, const Operand& opnd);
|
| D | assembler-s390.cc | 1599 void Assembler::rllg(Register r1, Register r3, Register opnd) { in rllg() function in v8::internal::Assembler
1605 void Assembler::rllg(Register r1, Register r3, const Operand& opnd) { in rllg() function in v8::internal::Assembler
1610 void Assembler::rllg(Register r1, Register r3, Register r2, in rllg() function in v8::internal::Assembler
|
| D | constants-s390.h | 168 V(rllg, RLLG, 0xEB1C) /* type = RSY_A ROTATE LEFT SINGLE LOGICAL (64) */ \
|
| /external/llvm/test/MC/Disassembler/SystemZ/ |
| D | insns.txt | 7486 # CHECK: rllg %r0, %r0, 0
7489 # CHECK: rllg %r15, %r1, 0
7492 # CHECK: rllg %r1, %r15, 0
7495 # CHECK: rllg %r15, %r15, 0
7498 # CHECK: rllg %r0, %r0, -524288
7501 # CHECK: rllg %r0, %r0, -1
7504 # CHECK: rllg %r0, %r0, 1
7507 # CHECK: rllg %r0, %r0, 524287
7510 # CHECK: rllg %r0, %r0, 0(%r1)
7513 # CHECK: rllg %r0, %r0, 0(%r15)
[all …]
|
| /external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
| D | SystemZInstrInfo.td | 974 "rllg\t{$dst, $src, $amt}",
|
| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrInfo.td | 1230 def RLLG : BinaryRSY<"rllg", 0xEB1C, rotl, GR64>;
|