Searched refs:sh2 (Results 1 – 7 of 7) sorted by relevance
| /external/llvm/test/CodeGen/AArch64/ |
| D | extract.ll | 51 %sh2 = lshr i32 %b, 14
52 %val = or i32 %sh2, %sh1
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| D | arm64-extract.ll | 52 %sh2 = lshr i32 %b, 14
53 %val = or i32 %sh2, %sh1
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| /external/deqp/framework/common/ |
| D | tcuAstcUtil.cpp | 1369 const int sh2 = (seed & 1) != 0 ? shB : shA; in computeTexelPartition() local
1370 const int sh3 = (seed & 0x10) != 0 ? sh1 : sh2; in computeTexelPartition()
1373 seed2 = (deUint8)(seed2 >> sh2); in computeTexelPartition()
1375 seed4 = (deUint8)(seed4 >> sh2); in computeTexelPartition()
1377 seed6 = (deUint8)(seed6 >> sh2); in computeTexelPartition()
1379 seed8 = (deUint8)(seed8 >> sh2); in computeTexelPartition()
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| /external/hyphenation-patterns/en-US/ |
| D | hyph-en-us.pat.txt | 165 .sh2
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| /external/valgrind/VEX/priv/ |
| D | guest_arm_toIR.c | 2416 UInt sh2, UInt imm5, in mk_EA_reg_plusminus_shifted_reg() argument
2422 vassert(sh2 < 4); in mk_EA_reg_plusminus_shifted_reg()
2426 switch (sh2) { in mk_EA_reg_plusminus_shifted_reg()
15953 UInt sh2 = INSN(6,5); in decode_NV_instruction_ARMv7_and_below() local
15958 sh2, imm5, dis_buf); in decode_NV_instruction_ARMv7_and_below()
16581 UInt sh2 = (insn >> 5) & 3; /* 6:5 */ in disInstr_ARM_WRK() local
16614 eaE = mk_EA_reg_plusminus_shifted_reg( rN, bU, rM, sh2, imm5, in disInstr_ARM_WRK()
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| /external/hyphenation-patterns/ga/ |
| D | hyph-ga.pat.txt | 5210 1sh2
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| /external/hyphenation-patterns/en-GB/ |
| D | hyph-en-gb.pat.txt | 416 .sh2
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