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Searched refs:simm7 (Results 1 – 4 of 4) sorted by relevance

/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/
DSPUOperands.td76 // simm7 predicate - True if the immediate fits in an 7-bit signed
78 def simm7: PatLeaf<(imm), [{
/external/valgrind/
DREADME.aarch64223 LDP,STP (immediate, simm7) (FP&VEC)
/external/valgrind/VEX/priv/
Dguest_arm64_toIR.c4893 Long simm7 = (Long)sx_to_64(INSN(21,15), 7); in dis_ARM64_load_store() local
4904 simm7 = (bX ? 8 : 4) * simm7; in dis_ARM64_load_store()
4905 assign(tEA, binop(Iop_Add64, mkexpr(tRN), mkU64(simm7))); in dis_ARM64_load_store()
4932 = bWBack && simm7 < 0 in dis_ARM64_load_store()
4985 nameIReg64orSP(rN), simm7); in dis_ARM64_load_store()
5011 Long simm7 = (Long)sx_to_64(INSN(21,15), 7); in dis_ARM64_load_store() local
5022 simm7 = 4 * simm7; in dis_ARM64_load_store()
5023 assign(tEA, binop(Iop_Add64, mkexpr(tRN), mkU64(simm7))); in dis_ARM64_load_store()
5066 nameIReg64orSP(rN), simm7); in dis_ARM64_load_store()
5408 Long simm7 = (Long)sx_to_64(INSN(21,15), 7); in dis_ARM64_load_store() local
[all …]
/external/valgrind/none/tests/arm64/
Dmemory.stdout.exp10 LDUR,STUR (immediate, simm9): STR cases are MISSINGLDP,STP (immediate, simm7) (STR cases and wb che…
54 LDP,STP (immediate, simm7) (FP&VEC) (entirely MISSING)
101 LDPSW (immediate, simm7)
529 LDP,STP (immediate, simm7)
2935 LDP,STP (immediate, simm7) (FP&VEC)
3476 LDNP,STNP (immediate, simm7) (FP&VEC, w/ nontemporal hint)
26268 LDPSW (immediate, simm7)