/external/llvm/test/CodeGen/ARM/ |
D | intrinsics-coprocessor.ll | 32 ; CHECK: stcl p7, c3, [r{{[0-9]+}}] 33 tail call void @llvm.arm.stcl(i32 7, i32 3, i8* %i) nounwind 55 declare void @llvm.arm.stcl(i32, i32, i8*) nounwind
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/external/clang/test/CodeGen/ |
D | builtins-arm.c | 124 void stcl(void *i) { in stcl() function
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/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
D | basic-arm-instructions.s | 1951 stcl p3, c10, [r6, #4] 1952 stcl p2, c11, [r7] 1953 stcl p1, c12, [r8, #-224] 1954 stcl p0, c13, [r9, #-120]! 1955 stcl p6, c14, [r10], #16 1956 stcl p7, c15, [r11], #-72 1992 @ CHECK: stcl p3, c10, [r6, #4] @ encoding: [0x01,0xa3,0xc6,0xed] 1993 @ CHECK: stcl p2, c11, [r7] @ encoding: [0x00,0xb2,0xc7,0xed] 1994 @ CHECK: stcl p1, c12, [r8, #-224] @ encoding: [0x38,0xc1,0x48,0xed] 1995 @ CHECK: stcl p0, c13, [r9, #-120]! @ encoding: [0x1e,0xd0,0x69,0xed] [all …]
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D | basic-thumb2-instructions.s | 2207 stcl p3, c10, [r6, #4] 2208 stcl p2, c11, [r7] 2209 stcl p1, c12, [r8, #-224] 2210 stcl p0, c13, [r9, #-120]! 2211 stcl p6, c14, [r10], #16 2212 stcl p7, c15, [r11], #-72 2235 @ CHECK: stcl p3, c10, [r6, #4] @ encoding: [0xc6,0xed,0x01,0xa3] 2236 @ CHECK: stcl p2, c11, [r7] @ encoding: [0xc7,0xed,0x00,0xb2] 2237 @ CHECK: stcl p1, c12, [r8, #-224] @ encoding: [0x48,0xed,0x38,0xc1] 2238 @ CHECK: stcl p0, c13, [r9, #-120]! @ encoding: [0x69,0xed,0x1e,0xd0] [all …]
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/external/llvm/test/MC/ARM/ |
D | basic-thumb2-instructions.s | 2668 stcl p3, c10, [r6, #4] 2669 stcl p2, c11, [r7] 2670 stcl p1, c12, [r8, #-224] 2671 stcl p0, c13, [r9, #-120]! 2672 stcl p6, c14, [r10], #16 2673 stcl p7, c15, [r11], #-72 2696 @ CHECK: stcl p3, c10, [r6, #4] @ encoding: [0xc6,0xed,0x01,0xa3] 2697 @ CHECK: stcl p2, c11, [r7] @ encoding: [0xc7,0xed,0x00,0xb2] 2698 @ CHECK: stcl p1, c12, [r8, #-224] @ encoding: [0x48,0xed,0x38,0xc1] 2699 @ CHECK: stcl p0, c13, [r9, #-120]! @ encoding: [0x69,0xed,0x1e,0xd0] [all …]
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D | basic-arm-instructions.s | 2767 stcl p3, c10, [r6, #4] 2768 stcl p2, c11, [r7] 2769 stcl p1, c12, [r8, #-224] 2770 stcl p0, c13, [r9, #-120]! 2771 stcl p6, c14, [r10], #16 2772 stcl p7, c15, [r11], #-72 2808 @ CHECK: stcl p3, c10, [r6, #4] @ encoding: [0x01,0xa3,0xc6,0xed] 2809 @ CHECK: stcl p2, c11, [r7] @ encoding: [0x00,0xb2,0xc7,0xed] 2810 @ CHECK: stcl p1, c12, [r8, #-224] @ encoding: [0x38,0xc1,0x48,0xed] 2811 @ CHECK: stcl p0, c13, [r9, #-120]! @ encoding: [0x1e,0xd0,0x69,0xed] [all …]
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/external/llvm/test/MC/Disassembler/ARM/ |
D | arm-tests.txt | 278 # CHECK: stcl p13, c12, [r9, #0]!
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/external/valgrind/docs/internals/ |
D | 3_8_BUGSTATUS.txt | 214 (stcl, gdb disassembles to stfp) .. IWMMXT
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMInstrThumb2.td | 3527 defm t2STCL : t2LdStCop<0b1110, 0, 1, "stcl">;
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D | ARMInstrInfo.td | 4416 defm STCL : LdStCop <0, 1, "stcl">;
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/external/llvm/lib/Target/ARM/ |
D | ARMInstrThumb2.td | 4015 defm t2STCL : t2LdStCop<0b1110, 0, 1, "stcl", [(int_arm_stcl imm:$cop, imm:$CRd, addrmode5:$addr)]…
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D | ARMInstrInfo.td | 5019 defm STCL : LdStCop <0, 1, "stcl", [(int_arm_stcl imm:$cop, imm:$CRd, addrmode5:$addr)]>;
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/external/swiftshader/third_party/llvm-subzero/build/Android/include/llvm/IR/ |
D | Intrinsics.gen | 689 arm_stcl, // llvm.arm.stcl 6747 "llvm.arm.stcl", 14687 3, // llvm.arm.stcl
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/external/swiftshader/third_party/llvm-subzero/build/MacOS/include/llvm/IR/ |
D | Intrinsics.gen | 683 arm_stcl, // llvm.arm.stcl 6707 "llvm.arm.stcl", 14592 3, // llvm.arm.stcl
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/external/swiftshader/third_party/llvm-subzero/build/Windows/include/llvm/IR/ |
D | Intrinsics.gen | 689 arm_stcl, // llvm.arm.stcl 6747 "llvm.arm.stcl", 14687 3, // llvm.arm.stcl
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/external/swiftshader/third_party/llvm-subzero/build/Linux/include/llvm/IR/ |
D | Intrinsics.gen | 689 arm_stcl, // llvm.arm.stcl 6747 "llvm.arm.stcl", 14687 3, // llvm.arm.stcl
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