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Searched refs:uqsub8 (Results 1 – 20 of 20) sorted by relevance

/external/valgrind/none/tests/arm/
Dv6media.stdout.exp2193 uqsub8 r0, r1, r2 :: rd 0x0000fffc rm 0x0009ffff, rn 0x00180003, carryin 0, cpsr 0x00000000 g…
2194 uqsub8 r0, r1, r2 :: rd 0x000f0000 rm 0x00180003, rn 0x0009ffff, carryin 0, cpsr 0x00000000 g…
2195 uqsub8 r0, r1, r2 :: rd 0x0000000f rm 0x00030018, rn 0xffff0009, carryin 0, cpsr 0x00000000 g…
2196 uqsub8 r0, r1, r2 :: rd 0xfffc0000 rm 0xffff0009, rn 0x00030018, carryin 0, cpsr 0x00000000 g…
2197 uqsub8 r0, r1, r2 :: rd 0x0000000f rm 0x00000318, rn 0xff00ff09, carryin 0, cpsr 0x00000000 g…
2198 uqsub8 r0, r1, r2 :: rd 0xfffc0000 rm 0xffff0009, rn 0x00030018, carryin 0, cpsr 0x00000000 g…
2199 uqsub8 r0, r1, r2 :: rd 0x0000000f rm 0x00020318, rn 0xff07ff09, carryin 0, cpsr 0x00000000 g…
2200 uqsub8 r0, r1, r2 :: rd 0xff05fc00 rm 0xff07ff09, rn 0x00020318, carryin 0, cpsr 0x00000000 g…
2201 uqsub8 r0, r1, r2 :: rd 0x00000000 rm 0xb8035b5b, rn 0xce0ce1ed, carryin 0, cpsr 0x00000000 g…
2202 uqsub8 r0, r1, r2 :: rd 0x00003299 rm 0x146275d8, rn 0xaae3433f, carryin 0, cpsr 0x00000000 g…
[all …]
/external/vixl/test/aarch32/
Dtest-assembler-cond-rd-rn-rm-t32.cc90 M(uqsub8) \
Dtest-assembler-cond-rd-rn-rm-a32.cc91 M(uqsub8) \
/external/swiftshader/third_party/LLVM/test/MC/ARM/
Dbasic-arm-instructions.s2444 uqsub8 r2, r1, r4
2449 @ CHECK: uqsub8 r2, r1, r4 @ encoding: [0xf4,0x2f,0x61,0xe6]
Dbasic-thumb2-instructions.s2988 uqsub8 r8, r2, r9
2994 @ CHECK: uqsub8 r8, r2, r9 @ encoding: [0xc2,0xfa,0x59,0xf8]
/external/vixl/src/aarch32/
Dassembler-aarch32.h3633 void uqsub8(Condition cond, Register rd, Register rn, Register rm);
3634 void uqsub8(Register rd, Register rn, Register rm) { uqsub8(al, rd, rn, rm); } in uqsub8() function
Ddisasm-aarch32.h1287 void uqsub8(Condition cond, Register rd, Register rn, Register rm);
Dassembler-aarch32.cc12321 void Assembler::uqsub8(Condition cond, Register rd, Register rn, Register rm) { in uqsub8() function in vixl::aarch32::Assembler
12338 Delegate(kUqsub8, &Assembler::uqsub8, cond, rd, rn, rm); in uqsub8()
Ddisasm-aarch32.cc3556 void Disassembler::uqsub8(Condition cond, in uqsub8() function in vixl::aarch32::Disassembler
21295 uqsub8(CurrentCond(), in DecodeT32()
63840 uqsub8(condition, Register(rd), Register(rn), Register(rm)); in DecodeA32()
Dmacro-assembler-aarch32.h5190 uqsub8(cond, rd, rn, rm); in Uqsub8()
/external/llvm/test/MC/ARM/
Dbasic-thumb2-instructions.s3485 uqsub8 r8, r2, r9
3491 @ CHECK: uqsub8 r8, r2, r9 @ encoding: [0xc2,0xfa,0x59,0xf8]
Dbasic-arm-instructions.s3362 uqsub8 r2, r1, r4
3367 @ CHECK: uqsub8 r2, r1, r4 @ encoding: [0xf4,0x2f,0x61,0xe6]
/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/
Dbasic-arm-instructions.txt2182 # CHECK: uqsub8 r2, r1, r4
Dthumb2.txt2335 # CHECK: uqsub8 r8, r2, r9
/external/llvm/test/MC/Disassembler/ARM/
Dthumb2.txt2486 # CHECK: uqsub8 r8, r2, r9
Dbasic-arm-instructions.txt2355 # CHECK: uqsub8 r2, r1, r4
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMInstrThumb2.td1951 def t2UQSUB8 : T2I_pam<0b100, 0b0101, "uqsub8">;
DARMInstrInfo.td3184 def UQSUB8 : AAI<0b01100110, 0b11111111, "uqsub8">;
/external/llvm/lib/Target/ARM/
DARMInstrThumb2.td2156 def t2UQSUB8 : T2I_pam<0b100, 0b0101, "uqsub8">;
DARMInstrInfo.td3585 def UQSUB8 : AAI<0b01100110, 0b11111111, "uqsub8">;