| /external/valgrind/none/tests/arm64/ |
| D | crc32.c | 58 TESTINST3("crc32b w21,w20,w19", 0x4b154113f7d32514, 0xcce230caafbf9cc9, x21,x20,x19, 0); in main()
59 TESTINST3("crc32b w21,w20,w19", 0x33d5d595721d4f13, 0xf4509311f443a7ce, x21,x20,x19, 0); in main()
60 TESTINST3("crc32b w21,w20,w19", 0x4a3c6de6954cbc17, 0x111b21e39fbd7254, x21,x20,x19, 0); in main()
61 TESTINST3("crc32b w21,w20,w19", 0xfbb5c64ed1b044c6, 0x33ca4c4fb3960326, x21,x20,x19, 0); in main()
62 TESTINST3("crc32b w21,w20,w19", 0x2b7c5939d7c0f528, 0xb73870a5a6630162, x21,x20,x19, 0); in main()
63 TESTINST3("crc32b w21,w20,w19", 0x02fe41918ac5cdba, 0x48e0815289728f05, x21,x20,x19, 0); in main()
64 TESTINST3("crc32b w21,w20,w19", 0xb60a8f381f187bae, 0x008c208cc413ff72, x21,x20,x19, 0); in main()
66 TESTINST3("crc32h w21,w20,w19", 0x4b154113f7d32514, 0xcce230caafbf9cc9, x21,x20,x19, 0); in main()
67 TESTINST3("crc32h w21,w20,w19", 0x33d5d595721d4f13, 0xf4509311f443a7ce, x21,x20,x19, 0); in main()
68 TESTINST3("crc32h w21,w20,w19", 0x4a3c6de6954cbc17, 0x111b21e39fbd7254, x21,x20,x19, 0); in main()
[all …]
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | armv8.1a-rdma.txt | 3 [0x20,0x84,0x02,0x2e] # sqrdmlah v0.8b, v1.8b, v2.8b
4 [0x20,0x8c,0x02,0x2e] # sqrdmlsh v0.8b, v1.8b, v2.8b
5 [0x20,0x84,0xc2,0x2e] # sqrdmlah v0.1d, v1.1d, v2.1d
6 [0x20,0x8c,0xc2,0x2e] # sqrdmlsh v0.1d, v1.1d, v2.1d
7 [0x20,0x84,0x02,0x6e] # sqrdmlah v0.16b, v1.16b, v2.16b
8 [0x20,0x8c,0x02,0x6e] # sqrdmlsh v0.16b, v1.16b, v2.16b
9 [0x20,0x84,0xc2,0x6e] # sqrdmlah v0.2d, v1.2d, v2.2d
10 [0x20,0x8c,0xc2,0x6e] # sqrdmlsh v0.2d, v1.2d, v2.2d
12 # CHECK: [0x20,0x84,0x02,0x2e]
14 # CHECK: [0x20,0x8c,0x02,0x2e]
[all …]
|
| D | neon-instructions.txt | 18 0x00 0xd4 0x20 0x4e
25 0x20 0x9c 0x22 0x0e
32 0x20 0xdc 0x22 0x2e
53 0x20 0x1c 0x22 0x6e
63 0x20 0x1c 0x62 0x2e
65 0x20 0x1c 0xe2 0x6e
73 0x20 0x94 0x22 0x0e
81 0x20 0xcc 0x22 0x0e
152 0x20 0x7c 0x22 0x2e
249 0xff 0x99 0x20 0x4e
[all …]
|
| D | arm64-crypto.txt | 4 0x20 0x48 0x28 0x4e
5 0x20 0x58 0x28 0x4e
6 0x20 0x68 0x28 0x4e
7 0x20 0x78 0x28 0x4e
8 0x20 0x00 0x02 0x5e
9 0x20 0x10 0x02 0x5e
10 0x20 0x20 0x02 0x5e
11 0x20 0x30 0x02 0x5e
12 0x20 0x40 0x02 0x5e
13 0x20 0x50 0x02 0x5e
[all …]
|
| D | armv8.1a-vhe.txt | 3 0x20,0x20,0x1c,0xd5
4 0x20,0xd0,0x1c,0xd5
7 0x20,0xe3,0x1c,0xd5
10 0x00,0x20,0x1d,0xd5
11 0x20,0x20,0x1d,0xd5
12 0x40,0x20,0x1d,0xd5
14 0x20,0x51,0x1d,0xd5
20 0x20,0xd0,0x1d,0xd5
23 0x20,0xe2,0x1d,0xd5
26 0x20,0xe3,0x1d,0xd5
[all …]
|
| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/MBlaze/ |
| D | mblaze_imm.txt | 8 0x20 0x00 0x00 0x00
11 0x20 0x00 0x00 0x01
14 0x20 0x00 0x00 0x02
17 0x20 0x00 0x00 0x04
20 0x20 0x00 0x00 0x08
23 0x20 0x00 0x00 0x10
26 0x20 0x00 0x00 0x20
29 0x20 0x00 0x00 0x40
32 0x20 0x00 0x00 0x80
35 0x20 0x00 0x01 0x00
[all …]
|
| D | mblaze_special.txt | 36 0x94 0x20 0x80 0x00
39 0x94 0x20 0x80 0x01
42 0x94 0x20 0x80 0x03
45 0x94 0x20 0x80 0x05
48 0x94 0x20 0x80 0x07
51 0x94 0x20 0x80 0x0b
54 0x94 0x20 0x80 0x0d
57 0x94 0x20 0x90 0x00
60 0x94 0x20 0x90 0x01
63 0x94 0x20 0x90 0x02
[all …]
|
| D | mblaze_operands.txt | 20 0x00 0x84 0x20 0x00
104 0x20 0x00 0x00 0x00
107 0x20 0x00 0x00 0x01
110 0x20 0x00 0x00 0x02
113 0x20 0x00 0x00 0x04
116 0x20 0x00 0x00 0x08
119 0x20 0x00 0x00 0x10
122 0x20 0x00 0x00 0x20
125 0x20 0x00 0x00 0x40
128 0x20 0x00 0x00 0x80
[all …]
|
| /external/llvm/test/MC/Disassembler/Sparc/ |
| D | sparc-mem.txt | 7 0xd4 0x4e 0x20 0x20
19 0xd4 0x56 0x20 0x20
31 0xd4 0x0e 0x20 0x20
43 0xd4 0x16 0x20 0x20
55 0xd4 0x06 0x20 0x20
67 0xc5 0x06 0x20 0x20
79 0xc5 0x1e 0x20 0x20
91 0xc9 0x16 0x20 0x20
103 0xd4 0x5e 0x20 0x20
115 0xd4 0x46 0x20 0x20
[all …]
|
| /external/llvm/test/MC/Disassembler/PowerPC/ |
| D | ppc64-encoding-ext.txt | 5 0x4d 0x82 0x00 0x20
9 0x4d 0x86 0x00 0x20
13 0x4d 0x8a 0x00 0x20
17 0x4d 0x8e 0x00 0x20
21 0x4d 0x92 0x00 0x20
25 0x4d 0x96 0x00 0x20
29 0x4d 0x9a 0x00 0x20
33 0x4d 0x9e 0x00 0x20
36 0x4d 0x80 0x00 0x20
39 0x4d 0x81 0x00 0x20
[all …]
|
| D | ppc64le-encoding.txt | 20 0x20 0x18 0x8a 0x4c
23 0x20 0x00 0x8a 0x4c
32 0x20 0x1c 0x8a 0x4c
35 0x20 0x04 0x8a 0x4c
56 0x42 0x20 0x43 0x4c
89 0xae 0x20 0x43 0x7c
95 0xee 0x20 0x43 0x7c
125 0x2e 0x20 0x43 0x7c
131 0x6e 0x20 0x43 0x7c
146 0x2a 0x20 0x43 0x7c
[all …]
|
| D | ppc64-encoding.txt | 20 0x4c 0x8a 0x18 0x20
23 0x4c 0x8a 0x00 0x20
32 0x4c 0x8a 0x1c 0x20
35 0x4c 0x8a 0x04 0x20
56 0x4c 0x43 0x20 0x42
89 0x7c 0x43 0x20 0xae
95 0x7c 0x43 0x20 0xee
125 0x7c 0x43 0x20 0x2e
131 0x7c 0x43 0x20 0x6e
146 0x7c 0x43 0x20 0x2a
[all …]
|
| /external/libhevc/common/arm64/ |
| D | ihevc_intra_pred_luma_mode_18_34.s | 109 stp x19, x20,[sp,#-16]!
124 sub x20,x0,#2
125 csel x0, x20, x0,ne
126 mov x20,#1
127 csel x6, x20, x6,eq
128 mov x20,#-1
129 csel x6, x20, x6,ne
152 add x20,x0,#8
153 csel x0, x20, x0,ne
163 add x20,x2,#8
[all …]
|
| D | ihevc_sao_edge_offset_class3_chroma.s | 82 stp x19, x20,[sp,#-16]!
137 movn x20,#0
138 csel x12, x20, x12,LT
139 MOV x20,#1
140 csel x12, x20, x12,GT //SIGN(pu1_src[wd - 2] - pu1_src_top_right[0])
146 movn x20,#0
147 csel x11, x20, x11,LT
148 MOV x20,#1
149 csel x11, x20, x11,GT //SIGN(pu1_src[wd - 2] - pu1_src[wd - 2 - 2 + src_strd])
160 mov x20,#255
[all …]
|
| D | ihevc_sao_edge_offset_class2_chroma.s | 83 stp x19, x20,[sp,#-16]!
142 movn x20,#0
143 csel x12, x20, x12,LT
146 MOV x20,#1
147 csel x12, x20, x12,GT //SIGN(pu1_src[0] - pu1_src_top_left[0])
150 movn x20,#0
151 csel x11, x20, x11,LT
154 MOV x20,#1
155 csel x11, x20, x11,GT //SIGN(pu1_src[0] - pu1_src[2 + src_strd])
165 mov x20,#255
[all …]
|
| D | ihevc_deblk_chroma_horz.s | 67 stp x19, x20,[sp,#-16]!
92 sub x20,x1,#6
93 csel x1, x20, x1,gt
102 sub x20,x2,#6
103 csel x2, x20, x2,gt
109 mov x20,#0x35
110 csel x1, x20, x1,gt
115 add x20,x1,#2
116 csel x1, x20, x1,pl
117 mov x20,#0
[all …]
|
| D | ihevc_sao_edge_offset_class2.s | 83 stp x19, x20,[sp,#-16]!
125 movn x20,#0
126 csel x12, x20, x12,LT
127 MOV x20,#1
128 csel x12, x20, x12,GT //SIGN(pu1_src[0] - pu1_src_top_left[0])
134 movn x20,#0
135 csel x11, x20, x11,LT
136 MOV x20,#1
137 csel x11, x20, x11,GT //SIGN(pu1_src[0] - pu1_src[1 + src_strd])
146 mov x20,#255
[all …]
|
| D | ihevc_sao_edge_offset_class3.s | 73 stp x19, x20,[sp,#-16]!
82 MOV x20,x5 //Store pu1_src_top_right in sp
120 MOV x11,x20 //Load pu1_src_top_right from sp
130 movn x20,#0
131 csel x12, x20, x12,LT
134 MOV x20,#1
135 csel x12, x20, x12,GT //SIGN(pu1_src[wd - 1] - pu1_src_top_right[0])
137 movn x20,#0
138 csel x11, x20, x11,LT
139 MOV x20,#1
[all …]
|
| D | ihevc_weighted_pred_bi_default.s | 126 stp x19, x20,[sp,#-16]!
133 mov x20,x8 // ht 56
142 mov x8,x20 //load ht
151 sub x20,x6,x3,lsl #2 //4*src_strd1 - wd
152 neg x7, x20
153 sub x20,x6,x4,lsl #2 //4*src_strd2 - wd
154 neg x10, x20
230 sub x20,x9,x5,lsl #2 //4*dst_strd - wd
231 neg x14, x20
243 sub x20,x6,x3,lsl #1 //2*src_strd1 - wd
[all …]
|
| D | ihevc_deblk_chroma_vert.s | 73 stp x19, x20,[sp,#-16]!
100 sub x20,x3,#6
101 csel x3, x20, x3,gt
116 sub x20,x2,#6
117 csel x2, x20, x2,gt
129 mov x20,#0x35
130 csel x3, x20, x3,gt
133 add x20,x3,#2
134 csel x3, x20, x3,pl
135 mov x20,#0
[all …]
|
| D | ihevc_intra_pred_chroma_mode_18_34.s | 109 stp x19, x20,[sp,#-16]!
124 sub x20,x0,#4
125 csel x0, x20, x0,ne
126 mov x20,#2
127 csel x6, x20, x6,eq
128 mov x20,#-2
129 csel x6, x20, x6,ne
168 sub x20,x0,#4
169 csel x0, x20, x0,ne
171 mov x20,#2
[all …]
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | move-banked-regs-thumb.txt | 3 [0xe0,0xf3,0x20,0x82]
4 [0xe1,0xf3,0x20,0x83]
5 [0xe2,0xf3,0x20,0x85]
6 [0xe3,0xf3,0x20,0x87]
7 [0xe4,0xf3,0x20,0x8b]
8 [0xe5,0xf3,0x20,0x81]
9 [0xe6,0xf3,0x20,0x82]
18 [0xe8,0xf3,0x20,0x82]
19 [0xe9,0xf3,0x20,0x83]
20 [0xea,0xf3,0x20,0x85]
[all …]
|
| /external/boringssl/linux-aarch64/crypto/fipsmodule/ |
| D | sha512-armv8.S | 56 stp x19,x20,[sp,#16]
63 ldp x20,x21,[x0] // load context
86 eor x19,x20,x21 // a^b, b^c in next round
88 ror x6,x20,#28
90 eor x17,x20,x20,ror#5
111 eor x28,x27,x20 // a^b, b^c in next round
119 eor x19,x19,x20 // Maj(a,b,c)
167 add x20,x20,x24 // d+=h
177 ror x16,x20,#14
179 eor x10,x20,x20,ror#23
[all …]
|
| /external/boringssl/ios-aarch64/crypto/fipsmodule/ |
| D | sha512-armv8.S | 55 stp x19,x20,[sp,#16]
62 ldp x20,x21,[x0] // load context
85 eor x19,x20,x21 // a^b, b^c in next round
87 ror x6,x20,#28
89 eor x17,x20,x20,ror#5
110 eor x28,x27,x20 // a^b, b^c in next round
118 eor x19,x19,x20 // Maj(a,b,c)
166 add x20,x20,x24 // d+=h
176 ror x16,x20,#14
178 eor x10,x20,x20,ror#23
[all …]
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| D | armv8-mont.S | 15 stp x19,x20,[sp,#16]
83 sub x20,x5,#8 // i=num-1
105 sub x20,x20,#8 // i--
158 cbnz x20,Louter
199 ldp x19,x20,[x29,#16]
215 stp x19,x20,[sp,#16]
251 mov x20,xzr
297 adds x20,x20,x14 // t[1]+lo(a[1]*a[0])
311 stp x19,x20,[x2],#8*2 // t[0..1]
341 adc x20,xzr,xzr // t[9]
[all …]
|