| /external/llvm/test/MC/Disassembler/PowerPC/ |
| D | qpx.txt | 40 0x10 0x60 0x2e 0x5c
43 0x10 0x60 0x2f 0x5c
223 0x7c 0x69 0x5c 0xcf
226 0x7c 0x69 0x5c 0xce
229 0x7c 0x6a 0x5c 0x8f
232 0x7c 0x6a 0x5c 0x8e
247 0x7c 0x69 0x5c 0x4f
250 0x7c 0x69 0x5c 0x4e
253 0x7c 0x6a 0x5c 0x0f
256 0x7c 0x6a 0x5c 0x0e
[all …]
|
| D | vsx.txt | 49 0xf3 0x1f 0xd9 0x5c
247 0xf0 0xff 0xdb 0x5c
250 0xf0 0xff 0xdf 0x5c
253 0xf0 0xff 0xda 0x5c
256 0xf0 0xff 0xde 0x5c
630 0xf0 0xff 0xd8 0x5c
|
| D | ppc64le-encoding.txt | 77 0x5c 0x03 0x00 0x7c
80 0x5c 0xba 0x3e 0x7d
548 0x4c 0x21 0x62 0x5c
551 0x4d 0x21 0x62 0x5c
|
| D | ppc64-encoding.txt | 77 0x7c 0x00 0x03 0x5c
80 0x7d 0x3e 0xba 0x5c
569 0x5c 0x62 0x21 0x4c
572 0x5c 0x62 0x21 0x4d
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | load-store-acquire-release-v8.txt | 20 0x9f 0x5c 0x96 0xe1
21 0x9f 0x5c 0xd6 0xe1
23 # CHECK: lda r5, [r6] @ encoding: [0x9f,0x5c,0x96,0xe1]
24 # CHECK: ldab r5, [r6] @ encoding: [0x9f,0x5c,0xd6,0xe1]
|
| D | thumb-neon-v8.txt | 5 0x08 0xff 0x5c 0x4f
|
| D | neon-v8.txt | 5 0x5c 0x4f 0x08 0xf3
|
| /external/llvm/test/MC/Disassembler/Mips/msa/ |
| D | test_3rf.txt | 16 0x78 0x6b 0xcc 0x5c # CHECK: fcor.d $w17, $w25, $w11
25 0x78 0x93 0x93 0x5c # CHECK: fcune.w $w13, $w18, $w19
67 0x7a 0x5c 0x90 0xda # CHECK: fsun.w $w3, $w18, $w28
68 0x7a 0x73 0x5c 0x9a # CHECK: fsun.d $w18, $w11, $w19
76 0x7b 0x70 0x67 0x5c # CHECK: maddr_q.w $w29, $w12, $w16
78 0x79 0xbc 0xf3 0x5c # CHECK: msub_q.w $w13, $w30, $w28
80 0x7b 0xb4 0x70 0x5c # CHECK: msubr_q.w $w1, $w14, $w20
|
| /external/python/cpython2/Modules/cjkcodecs/ |
| D | README | 50 Because euc-jisx0213 has REVERSE SOLIDUS on 0x5c already and A140
68 - U+00A5 YEN SIGN is mapped to EUC-JP 0x5c. (one way)
76 - U+005C REVERSE SOLIDUS is mapped to SHIFT-JIS 0x5c.
|
| /external/llvm/test/MC/Disassembler/X86/ |
| D | x86-64.txt | 426 0x62 0x11 0x5c 0x40 0x58 0x3d 0x00 0x33 0x22 0x11
428 0x62 0x31 0x5c 0x40 0x58 0x3d 0x00 0x33 0x22 0x11
430 0x62 0x51 0x5c 0x40 0x58 0x3d 0x00 0x33 0x22 0x11
432 0x62 0x71 0x5c 0x40 0x58 0x3d 0x00 0x33 0x22 0x11
440 0x62 0x11 0x5c 0x40 0x58 0x3c 0x0a
444 0x62 0x31 0x5c 0x40 0x58 0x3c 0x0a
448 0x62 0x51 0x5c 0x40 0x58 0x3c 0x0a
452 0x62 0x71 0x5c 0x40 0x58 0x3c 0x0a
|
| /external/clang/test/SemaTemplate/ |
| D | member-access-expr.cpp | 119 void test_X5(X5<X4> x5, X5<const X4> x5c, X4 *xp, const X4 *cxp) { in test_X5() argument
121 x5c.g(cxp); in test_X5()
|
| /external/llvm/test/MC/Disassembler/Hexagon/ |
| D | j.txt | 161 0x22 0xc3 0x00 0x5c
163 0x22 0xc3 0x20 0x5c
167 0x03 0x40 0x45 0x85 0x00 0xcb 0x00 0x5c
170 0x03 0x40 0x45 0x85 0x00 0xdb 0x00 0x5c
173 0x03 0x40 0x45 0x85 0x00 0xcb 0x20 0x5c
176 0x03 0x40 0x45 0x85 0x00 0xdb 0x20 0x5c
|
| /external/llvm/test/MC/Disassembler/Mips/mips32r6/ |
| D | valid-mips32r6-el.txt | 33 0x40 0x00 0xa5 0x5c # CHECK: bltzc $5, 260
34 0xfa 0xff 0xa5 0x5c # CHECK: bltzc $5, -20
43 0x40 0x00 0x05 0x5c # CHECK: bgtzc $5, 260
44 0xfa 0xff 0x05 0x5c # CHECK: bgtzc $5, -20
48 0x40 0x00 0xa6 0x5c # CHECK: bltc $5, $6, 260
49 0xfa 0xff 0xa6 0x5c # CHECK: bltc $5, $6, -20
|
| D | valid-mips32r6.txt | 160 0x5c 0x05 0x00 0x40 # CHECK: bgtzc $5, 260
161 0x5c 0x05 0xff 0xfa # CHECk: bgtzc $5, -20
162 0x5c 0xa5 0x00 0x40 # CHECK: bltzc $5, 260
163 0x5c 0xa5 0xff 0xfa # CHECK: bltzc $5, -20
164 0x5c 0xa6 0x00 0x40 # CHECK: bltc $5, $6, 260
165 0x5c 0xa6 0xff 0xfa # CHECK: bltc $5, $6, -20
|
| /external/ipsec-tools/src/racoon/missing/crypto/rijndael/ |
| D | boxes-fst.dat | 60 {0x68,0x34,0x34,0x5c}, {0x51,0xa5,0xa5,0xf4}, {0xd1,0xe5,0xe5,0x34}, {0xf9,0xf1,0xf1,0x08},
91 {0x92,0x49,0x49,0xdb}, {0x0c,0x06,0x06,0x0a}, {0x48,0x24,0x24,0x6c}, {0xb8,0x5c,0x5c,0xe4},
98 {0x6f,0xba,0xba,0xd5}, {0xf0,0x78,0x78,0x88}, {0x4a,0x25,0x25,0x6f}, {0x5c,0x2e,0x2e,0x72},
130 {0x5c,0x68,0x34,0x34}, {0xf4,0x51,0xa5,0xa5}, {0x34,0xd1,0xe5,0xe5}, {0x08,0xf9,0xf1,0xf1},
161 {0xdb,0x92,0x49,0x49}, {0x0a,0x0c,0x06,0x06}, {0x6c,0x48,0x24,0x24}, {0xe4,0xb8,0x5c,0x5c},
168 {0xd5,0x6f,0xba,0xba}, {0x88,0xf0,0x78,0x78}, {0x6f,0x4a,0x25,0x25}, {0x72,0x5c,0x2e,0x2e},
200 {0x34,0x5c,0x68,0x34}, {0xa5,0xf4,0x51,0xa5}, {0xe5,0x34,0xd1,0xe5}, {0xf1,0x08,0xf9,0xf1},
231 {0x49,0xdb,0x92,0x49}, {0x06,0x0a,0x0c,0x06}, {0x24,0x6c,0x48,0x24}, {0x5c,0xe4,0xb8,0x5c},
238 {0xba,0xd5,0x6f,0xba}, {0x78,0x88,0xf0,0x78}, {0x25,0x6f,0x4a,0x25}, {0x2e,0x72,0x5c,0x2e},
270 {0x34,0x34,0x5c,0x68}, {0xa5,0xa5,0xf4,0x51}, {0xe5,0xe5,0x34,0xd1}, {0xf1,0xf1,0x08,0xf9},
[all …]
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r6/ |
| D | valid-mips64r6-el.txt | 34 0x40 0x00 0x05 0x5c # CHECK: bgtzc $5, 260
35 0xfa 0xff 0x05 0x5c # CHECK: bgtzc $5, -20
41 0x40 0x00 0xa6 0x5c # CHECK: bltc $5, $6, 260
42 0xfa 0xff 0xa6 0x5c # CHECK: bltc $5, $6, -20
47 0x40 0x00 0xa5 0x5c # CHECK: bltzc $5, 260
48 0xfa 0xff 0xa5 0x5c # CHECK: bltzc $5, -20
|
| D | valid-mips64r6.txt | 179 0x5c 0x05 0x00 0x40 # CHECK: bgtzc $5, 260
180 0x5c 0x05 0xff 0xfa # CHECk: bgtzc $5, -20
181 0x5c 0xa5 0x00 0x40 # CHECK: bltzc $5, 260
182 0x5c 0xa5 0xff 0xfa # CHECK: bltzc $5, -20
183 0x5c 0xa6 0x00 0x40 # CHECK: bltc $5, $6, 260
184 0x5c 0xa6 0xff 0xfa # CHECK: bltc $5, $6, -20
|
| /external/llvm/test/MC/Disassembler/Mips/micromips32r3/ |
| D | invalid.txt | 4 0x21 0xe2 0x5c 0x71 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
|
| /external/openssh/ |
| D | ge25519_base.data | 11 …, 0x60, 0x2d, 0x56, 0xc9, 0xb2, 0xa7, 0x25, 0x95, 0x60, 0xc7, 0x2c, 0x69, 0x5c, 0xdc, 0xd6, 0xfd, …
15 {{{0x5c, 0xe2, 0xf8, 0xd3, 0x5f, 0x48, 0x62, 0xac, 0x86, 0x48, 0x62, 0x81, 0x19, 0x98, 0x43, 0x63, …
21 …, 0x99, 0x8b, 0x69, 0x80, 0x7b, 0xc6, 0x3a, 0xeb, 0x93, 0xcf, 0x4e, 0xf8, 0x5c, 0x2d, 0x86, 0x42, …
38 …, 0x0e, 0x26, 0xd3, 0x81, 0xaa, 0xeb, 0xf5, 0x6b, 0x79, 0x02, 0xf1, 0x51, 0x5c, 0x75, 0x55, 0x0f}}…
61 {{{0x02, 0xff, 0x32, 0x2b, 0x5c, 0x93, 0x54, 0x32, 0xe8, 0x57, 0x54, 0x1a, 0x8b, 0x33, 0x60, 0x65, …
75 …, 0x99, 0xab, 0xd9, 0x28, 0x63, 0x6d, 0x8b, 0x40, 0x69, 0x75, 0x6c, 0xcd, 0x5c, 0x2a, 0x7e, 0x32, …
84 …{{0x79, 0x51, 0x81, 0x01, 0xdc, 0x73, 0x53, 0xe0, 0x6e, 0x9b, 0xea, 0x68, 0x3f, 0x5c, 0x14, 0x84, …
93 …, 0xb0, 0xe5, 0x57, 0x1b, 0x5b, 0xf5, 0x45, 0x13, 0x14, 0x64, 0x5a, 0xeb, 0x5c, 0xfc, 0x54, 0x01, …
118 …, 0x5e, 0x7b, 0x4b, 0xe8, 0x43, 0x8c, 0x8f, 0x00, 0xb5, 0x54, 0x13, 0xc5, 0x5c, 0xb6, 0x35, 0x4e, …
132 …, 0x0d, 0x4a, 0xc9, 0x52, 0x6a, 0x61, 0x79, 0xe9, 0x76, 0xf3, 0x85, 0x52, 0x5c, 0x1b, 0x2c, 0xe1, …
[all …]
|
| /external/valgrind/none/tests/mips64/ |
| D | cvm_lx_ins.stdout.exp-LE | 23 lhux :: offset: 0x5c, out: 0x8b75
86 lwux :: offset: 0x5c, out: 0x52568b75
149 lbx :: offset: 0x5c, out: 0x75
|
| D | cvm_lx_ins.stdout.exp-BE | 23 lhux :: offset: 0x5c, out: 0x5256
86 lwux :: offset: 0x5c, out: 0x52568b75
149 lbx :: offset: 0x5c, out: 0x52
|
| /external/llvm/test/MC/Disassembler/Mips/mips32/ |
| D | valid-xfail-mips32.txt | 5 0x46 0x35 0x5c 0x30 # CHECK: c.f.d $fcc4, $f11, $f21
|
| /external/llvm/test/MC/Disassembler/XCore/ |
| D | xcore.txt | 229 0x5c 0x27
617 0xbc 0xf3 0x5c 0x73
667 0x35 0xf0 0x5c 0xd7
|
| /external/swiftshader/third_party/llvm-subzero/include/llvm/Support/ELFRelocs/ |
| D | ARM.def | 99 ELF_RELOC(R_ARM_TLS_DESCSEQ, 0x5c)
|
| /external/llvm/include/llvm/Support/ELFRelocs/ |
| D | ARM.def | 99 ELF_RELOC(R_ARM_TLS_DESCSEQ, 0x5c)
|